AM263P4-Q1: AM263P4 Internal FLASH (SIP) - SOP strapping

Hi Paul,

Paul Curran said:

Please confirm whether strapping of the SOP signals is required for the ZCZ-F (internal FLASH) variant of the part or whether these pins are internally configured for the FLASH die.

Yes, strapping of SOP signals is required for ZCZ-F (SIP).

Paul Curran said:

Can the pins that would normally be SOP be pulled in either direction during reset (according to their subsequent application) or do they still need to show the QSPI configuration setting or be left floating?

During the PORz rising edge (low to high logic transition) the SOP[3:0] signals are sampled. The resulting 4 bits are used to branch the boot ROM into the selected boot mode. Each SOP bootmode selection signal is multiplexed with a subset of OSPI/QSPI and SPI peripheral functional mode signals. Because of this SOP/functional-mode multiplexing additional care must be taken in schematic and layout to make sure that the SOP mode selection resistors, jumpers or switch paths are routed in such a way that the SOP mode branches do not present inductive PCB trace stubs to the functional mode signal paths. Failing to take care of this can result in non-functional OSPI/QSPI. This SOP mode isolation is accomplished by including a 10KΩ resistor in the SOP signal path. Isolation is required to prevent driving the SOP pins before boot is complete, as the functional mode signals shared with the SOP nets are capable of driving the SOP[3:0] states strong enough to disrupt the boot mode setting.

Please refer to Chapter 5 - Bootstrapping of AM26x Hardware Design Guidelines (https://www.ti.com/lit/ug/sprabj8d/sprabj8d.pdf#page=37) for more details.

Best Regards,
Mayank Shadwani

Mayank Shadwani said:

Yes, strapping of SOP signals is required for ZCZ-F (SIP).

Are you completely sure this is necessary even when the intended boot target is the internal QSPI? I'd thought that might be the case as no exceptions are mentioned in any of the documentation and the N1/N4 pins for the QSPI interface are deliberately omitted from the not connected list, but the evaluation board design (PROC159B) has a set of isolation resistors (Sheet 14) to disconnect the External QSPI from the AM263P4 (presumably for the internal flash variant, though I don't have a BOM for that build) and the SOP strapping drive happens outside of those isolation resistors. This is different to the strapping for Pin L1, for example, which is deliberately done inside the isolation resistors. It does suggest that pin N1/N4 might be undriven on the eval board, depending on the population options.

I understand how to drive the pins, just wanted to confirm that it was still required for this variant.

Thanks for the clarification and link to the SIP version of the reference design.

Please confirm then that the SOP pins need to be strapped into the "OSPI (8S) - Octal Read Mode" configuration for the SIP package.

Paul.