MSPM0C1106-Q1: 4Mhz SysOsc Clock not working.

Part Number: MSPM0C1106-Q1
Other Parts Discussed in Thread: MSPM0C1106

Hello,

 

I am trying to enable the 4Mhz SysOsc oscillator and monitor the frequency using the clkout functionality. What I observed is that even thogh the selected frequency is 4Mhz, the output frequency is 32Mhz. If I insert a pin toggle in a while loop after initialization the the toggle frequency will be 4x faster when the SysOsc frequency is set to 32Mhz vs 4Mhz.


What I fear is hat the base osc is always 32Mhz and there is only a devider of delivering the 4Mhz, which will not decrease the power consumption for the 4Mhz setting.

I attached the test project. 

empty_LP_MSPM0C1106_nortos_gcc.zip 

Thanks!

  • Hi Timotei,

    I got the same test result as you state here.

    According to the TRM statement, there has a secondary 4M output, I think there might have some issue on the CLK output path.

    Let me check internally to see what might be the root cause. Thanks for your feedback.

    If I insert a pin toggle in a while loop after initialization the the toggle frequency will be 4x faster when the SysOsc frequency is set to 32Mhz vs 4Mhz.

    BTW, I check the CPUCLK and ULPCLK, they look fine with 4MHz clock in my test. When I toggle the GPIO every 1ms in 4MHz, I see the expected waveform in GPIO.

    B,R,

    Sal

  • Hi Timotei,

    I confirm that this is under our expectation.

    For MSPM0C1106, the 4M is generated by a divider from 32MHz SYSOSC.

    B.R.

    Sal