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AM263P4-Q1: Active Low inputs to EPWM Digital Compare in Combinational mode?

Steven Hansen
Intellectual 696 points

Part Number: AM263P4-Q1

Hello,

We are bringing up a new board with AM263P4-Q1. This board has 5 external fault signals routed to GPIO inputs for tripping the EPWM Trip Zone (one shot). These inputs are failsafe, in other words Low = Fault and High = OK.

We intended to bring these faults into the Trip Zone like this:

GPIO1-5 => Input XBAR1-5 => PWM XBAR1-5 (Inverted) => EPWM DC Combinational Inputs 1-5 => DCAEVT1 => Trip Zone

However, after testing it appears the PWM XBAR invert bit doesn't actually invert the signals that propogate to the EPWM DC module. Since our fault signals are active low and the EPWM DC module ORs all signals together, we need this inversion or any fault signal that is OK (logic '1') would prevent the trip event. Figure 7-406 seems to show two status signals before the inverter, but there is no additional info in the TRM about exactly which EPWM XBAR signals (OUT? STATUS? FLAG?) propagate to the EPWM submodule.

To summarize my questions:

Q1:  Why does the PWM XBAR Invert bit not invert the signal to the EPWM Digital Compare inputs?

Q2: Is there any other way to invert GPIO signals before they reach the Digital Compare submodule?

 

  • 0
    TI__Expert 6030 points

    Hi Steven,

    I assigned the thread to the design/SW team to check the routing in details and confirm.

    Looks to me that the invert control applies only to the PWMXBAR output/flag/status presentation side, but the signal that propagates internally as an ePWM TripInput feeding the DC combinational OR path is effectively the non-inverted trip status (pre-inverter). 

    If you need hardware-fast, failsafe behavior, the clean option is inverting/combining externally. Otherwise, you can use software to force a trip which may have some short latency.

    Best Regards,

    Masoud

  • 0
    TI__Expert 7025 points

    Hello Steven

    Q1: Inversion is for the flag (PWMXbar.flag), not for the output (PWMXbar.out) which feeds to EPWM DC.

     

    Q2: 

    Within the EPWM DC submodule, we can choose the polarity. We can specify the criteria (polarity) of DCAH, DCAL, DCBH, DCBL to be used for generation of the 4 events, (DCAEVT1, 2, DCBEVT1, 2)

    Refer this register description

    But I think in your use case, this may not be of much help - since you have 5 fault signals reaching the EPWM DC OR gates and all are active low. 

    Thanks

    K.Sanjeev

  • 0
    TI__Expert 7025 points

    Hello Steven,

    The required routing (with inversion before reaching DC) doesnt look straightforward. I might have to check again on pinmux/qual/gpio side for some options

    We have done similar use case example on AM263x -> where we combine multiple fault signals based on arbitrary combinational logic and trip the PWMs in specific ways

    Refer this

    AM263Px MCU+ SDK: EPWM protection solution using PRU

    This is a bit complex solution which involves PRU (a processing core) which takes in 4x inputs (snapshot of 4 signals every core clock cycle) and the resulting output is fed to xbars to trip PWMs

    Signal path of above example is:

    GPIO 4x -> INPUTXBAR 4x -> PWMXBAR 4x -> GPI 4x of ICSS

    Then PRU firmware reads GPI reg, process, writes to GPO reg

    GPO 4x -> INPUTXBAR 4x -> PWMXBAR 4x  -> EPWM0+1+2 Trip 4x

    In your use case, I think the PRU firmware can just do ANDing operation itself on active low signals, or do an inversion of all 5 signals for ORing later with EPWM DC

    Thanks

    K.Sanjeev

  • 0
    TI__Expert 7025 points

    Hi Steven,

    INP_INV_SEL

    Can you check out this bit in the pinmux/IOMUX register of the GPIO pins you use?

    Thanks

    K.Sanjeev