MSPM0G3507: MSPM0G3507SRHBR Chip failure issue

Hi Tonyx,
I'm not 100% sure what is failing here. Can you share with me the details for it? Also, can you share the schematics with your local sales representative? That way we can keep track of this issue.

Best Regards,

Diego Abad

The sales（sales  zuguang-zhang@ti.com） representative has already been provided. The attached file AX20 that was given to you earlier contains the schematic diagram. Please review them together. Thank you!

Hi Diego,

This is analog MMFAE Ethan covering Quectel, plesae help to review the SCH "AX20.pdf " attached by Tony.

Best,
Ethan  

Hi Ethan,
I will review the schematics. I will send you the link to send it so you can add more information in regards of the case.

Best Regards,

Diego Abad

suggestion from AE side:

1. The I2C lines in P0 and PA1 will need a pull-up resistor to work. Also, remembner PA0 and PA1 are open-drain pins.
2. The VDD line shouldn't be pulled-down  with the 47K resistor. I think adding the 1000pF could help to minimize high frequency noise (however, it is not required)
3. Here's a guide the customer to calculate the current load in the low frequency crystal (2.1 Effective Load Capacitance)
4. I'm not sure why PA13 is being pulled-up. It is fine but I'm not sure the purpose of it
5. PA15 and PA16 need an external pull-up resistors since they are being used for I2C communication
6. It will be good if the SWD lines were left free when the device is being programmed. However, if it doesn't affect anything regarding the programming the device, it is fine.

Could you please help to see if there are any more suggestions and assist in handling the current issue of the customer?

Hi Tony,
There aren't any further suggestions based on the schematics I got. However, if the customer could share more information of the issue they are seeing, it will greatly help in finding out what is the root cause of it.

Best Regards,

Diego Abad

Hi Tony,

Thanks for the feedback. We are working back and forth with the customer on this issue. None of the points mentioned impact the low power mode issue they are seeing. Specially that they did MSP swap between good and bad and it follows the MSP not the board itself.

1) Are there any specific item(s) you would prioritize as a suspected root cause for the low-power issue, and why?
2) Based on the MSP swap test, the low-power issue follows the MSP, not the baseboard. Do you see any of the points you raised that could explain this behavior independent of the board?
3) Are any of these items known to cause elevated sleep current after firmware has entered low-power mode?
4) Have you seen any of these schematic conditions result in MSP-specific low-power failures in the field?

Hi Shaun,
1. What exact low-power issue is the customer facing? I don't think I have information on it. Normally, this will be a software issue rather than a hardware issue.

2. If a device behaves differently than another, there is a chance the device's hardware might be damaged. Damage can come from multiple things like ESD, overvoltage, and going outside out datasheet recommended operations parameters

3. It will depend on the peripherals being enabled. Some peripherals may raise power consumption in low power modes. More information can be found in the datasheet's specific module current consumption, though I could give an estimate if I know which modules are being used.

4. I haven't heard specifically of this conditions making a failure. However, the 47k pull-down resistor is not something we saw before in an schematic for the MSPM0. I'm still unsure why the customer add it. Normally, we recommend to leave VDD as close to our recommendations as possible.

Best Regards,

Diego Abad

Hi Diego,

I spoke with the customer and they responded, see below. 
Would it be possible to get you and or Tony on a phone call with the customer? What time zone are you in?

1- the chip goes into low power mode, and the only wake reason is POR or PA17 (Pin 21) going low

2- I measured the voltage on all the MSP pins of good and bad device and here is the summary: pins 1, 2, 3, 4, 21 high. all other pins all low

3- per 1 and 2. the chip is in low power mode and the only wake up is POR or PA17 going low

4- this is an RC circuit, and it should have nothing to do with the failure we are seeing. does he think this implementation on the VDD could cause the failure we are seeing?

5- I checked on the schematic the voltage level all these pins could be exposed to and nothing goes above 1.8v

Hi Shaun,

I think having a look into the code and getting some other questions answered will be best for now. You can also talk with your local sales representative to schedule a call with any member of the China team from the MSP GPLP Apps team. Can the customer provide the following:

1. The project they are using to program the boards, and maybe a high level flow diagram of how the project is supposed to work?

2. Is this issue happening in only one device/board? Or in multiple boards?

Best Regards,

Diego Abad