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TMS570LC4357: TMS570LS4357ZWT: nERROR asserted LOW after power-on

Detrois Hunag
Prodigy 30 points

Part Number: TMS570LC4357

Device / Tools

  • Device: TMS570LS4357ZWT (development board)

  • IDE/Debug: Code Composer Studio (CCS) Debug Tool (load program via debug session)

  • Observed signal: nERROR pin (active-low, external pull-up to ~3.3 V

Problem Summary

After power-on reset, the nERROR pin goes LOW early and stays LOW until I explicitly request an error-pin reset in software. I initially suspected a ROM “force error-pin” self-test, but the ESM status indicates a real Group2 error event.

What I Observed (Scope)

  • nERROR is pulled up to ~3.28 V when not asserted

  • After power-on, nERROR transitions LOW early and remains LOW for a long time

  • After my firmware calls esmTriggerErrorPinReset(), nERROR returns HIGH

nERROR.PNG

ESM Register Dump (captured in main)

At entry to main (nERROR is LOW):

EPSR=0x00000000 (pin=0)  EKR=0x00000000  LTCR=0x00003E70  LTCPR=0x00003FFF
SR1=0x00000000  SR2=0x00000008  SR3=0x00000000  SR4=0x00000000  SR7=0x00000000  SSR2=0x00000008
IOFFHR=0x00000024  IOFFLR=0x00000000

Later snapshots (after reading IOFFHR once):

EPSR=0x00000000 (pin=0)  EKR=0x00000000  LTCR=0x00000000  LTCPR=0x00003FFF
SR2=0x00000000  SSR2=0x00000008

After calling esmTriggerErrorPinReset():

EPSR=0x00000001 (pin=1)  EKR=0x00000000  LTCR=0x00003FFF  LTCPR=0x00003FFF
SR2=0x00000000  SSR2=0x00000008


Interpretation So Far

 

  • EPSR bit0 = 0 indicates ERROR pin asserted low.

  • SR2 = 0x8 and SSR2 = 0x8 indicate Group2 Channel 3 was set at least once.

  • IOFFHR = 0x24 appears to match Group2 channel 3 (0x21 + 3).

  • Reading IOFFHR seems to clear SR2 but not SSR2 (shadow retains the event).

  • After writing ESMEKR = 0x5 (via esmTriggerErrorPinReset()), nERROR returns HIGH, but SSR2 still shows the historical event.

 

According to the LS4357 ESM channel mapping, Group2 ch3 corresponds to:
“Cortex-R core – All fatal bus error events (commonly caused by improper/incomplete ECC values in Flash).”

Is Group2 ch3 at boot a known issue when loading/programming via CCS Debug Tool? 

Best Regards, 

Detrois

 
  • 0
    Prodigy 30 points

    Hi there,

    I referred to this TI E2E thread: TMS570LC4357: FLASH ECC Problem. I downloaded the attachment (7024.FEE_ECC_Errors_TEST_LC4357.zip) and overwrote my project's HL_sys_link.cmd with the file from the zip archive. I also configured the CCS Debug settings (Flash Settings) exactly as recommended in the post.

    However, after flashing the program, the CPU enters a Prefetch Abort state immediately.

    Could you please advise on what might be causing this issue despite following the E2E recommendations?

    Best regards,

    Detrois

  • 0
    Prodigy 30 points

    Hi there,

    I found that this error was caused by ECC not being enabled in the settings.

    Everything is fine now.I will keep this issue in case others encounter the same problem.

    Thanks,

    Detrois