AM263P4: Linker Memory Region defined over multiple OCRAM banks

Olivier Hepler

Part Number: AM263P4
Other Parts Discussed in Thread: SYSCONFIG, ,

Hi,

I recently had to enlarge the amount of RAM allocated to my program .text section. So initially I went into sysconfig and increased the pre existing OCRAM memory region from 0x40000 bytes to 0x50000 bytes.

However, this caused a prefetch abort fault during the first register write in OSPI_lld_phyBasicConfig(..) within the Board_flashOpen() call I make at the beginning of my program.

I also realized that the OCRAM banks are seperated out at the following intervals:

L2OCRAM_BANK0 --- start: 0x7000 0000 --- end: 0x7007 FFFF --- size: 512 KB

L2OCRAM_BANK1 --- start: 0x7008 0000 --- end: 0x700F FFFF --- size: 512 KB

L2OCRAM_BANK2 --- start: 0x7010 0000 --- end: 0x7017 FFFF --- size: 512 KB

L2OCRAM_BANK3 --- start: 0x7018 0000 --- end: 0x701F FFFF --- size: 512 KB

...

And thus my current OCRAM memory region which started at 0x70040000 and ended at 0x7008FFFF defined in the sysconfig overlaped between L2OCRAM_BANK0 and L2OCRAM_BANK1.

Thinking that this may be an issue I created a new memory region for my linker called OCRAM1 set only inside of L2OCRAM_BANK3. i also set my first OCRAM memory region back to just 0x40000 bytes in size so its only within L2OCRAM_BANK1. I then added OCRAM1 as the memory region used for the section requiring more space.

After making these changes I no longer get the prefetch abort fault and my application runs as expected.

My question is: are memory regions defined for the linker only allowed to be within a single OCRAM bank, i.e. a single memory region can't overlap two OCRAM banks?

Thank you

17 days ago

0 Shaunak Deshpande 16 days ago

TI__Mastermind 19202 points

Hi,

Can you check your map file to see if something is placed between the address where the OCRAM banks are split. Usually if aligned access and padding is enabled, this shouldn't be the case, If the access is unaligned, it might cause a fault.

In practice, i would suggest you can have the sections for linker defined as per this split to avoid any issues (which you have already rightly done)

Olivier Hepler said:
L2OCRAM_BANK0 --- start: 0x7000 0000 --- end: 0x7007 FFFF --- size: 512 KB

L2OCRAM_BANK1 --- start: 0x7008 0000 --- end: 0x700F FFFF --- size: 512 KB

L2OCRAM_BANK2 --- start: 0x7010 0000 --- end: 0x7017 FFFF --- size: 512 KB

L2OCRAM_BANK3 --- start: 0x7018 0000 --- end: 0x701F FFFF --- size: 512 KB

Regards,
Shaunak

0 Olivier Hepler 16 days ago in reply to Shaunak Deshpande

Prodigy 155 points

Hi,

I don't believe there is anything placed across the boundary. This is what I see stored at the boundary edge when I revert back to just having a single 0x50000 sized OCRAM region that crashes the program:

addr: size:
7007fff4 0000000c --HOLE-- [fill = 0]
70080000 00000044 drivers.am263px.r5f.ti-arm-clang.nortos.debug.lib : soc_rcm.obj (.text.SOC_rcmExtract8)

Thanks

0 Shaunak Deshpande 15 days ago in reply to Olivier Hepler

TI__Mastermind 19202 points

Hi Olivier,

Can you share your linker and syscfg file with me?

Regards,
Shaunak

0 Olivier Hepler 15 days ago in reply to Shaunak Deshpande

Prodigy 155 points

Hi,

here is the linker cmd file:

/* This is the stack that is used by code running within main()

* In case of NORTOS,

* - This means all the code outside of ISR uses this stack

* In case of FreeRTOS

* - This means all the code until vTaskStartScheduler() is called in main()

* uses this stack.

* - After vTaskStartScheduler() each task created in FreeRTOS has its own stack

--stack_size=16384

/* This is the heap size for malloc() API in NORTOS and FreeRTOS

* This is also the heap used by pvPortMalloc in FreeRTOS

--heap_size=32768

-e_vectors /* This is the entry of the application, _vector MUST be placed starting address 0x0 */

/* This is the size of stack when R5 is in IRQ mode

* In NORTOS,

* - Here interrupt nesting is enabled

* - This is the stack used by ISRs registered as type IRQ

* In FreeRTOS,

* - Here interrupt nesting is enabled

* - This is stack that is used initally when a IRQ is received

* - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks

* - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more

__IRQ_STACK_SIZE = 256;

/* This is the size of stack when R5 is in IRQ mode

* - In both NORTOS and FreeRTOS nesting is disabled for FIQ

__FIQ_STACK_SIZE = 256;

__SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */

__ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */

__UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */

SECTIONS

{

.vectors : {

} > R5F_VECS , palign(8)

GROUP : {

.text.hwi : {

} palign(8)

.text.cache : {

} palign(8)

.text.mpu : {

} palign(8)

.text.boot : {

} palign(8)

.text:abort : {

} palign(8)

} > OCRAM

GROUP : {

.text : {

} palign(8)

.rodata : {

} palign(8)

} > OCRAM

GROUP : {

.data : {

} palign(8)

} > OCRAM

GROUP : {

.bss : {

} palign(8)

RUN_START(__BSS_START)

RUN_END(__BSS_END)

.sysmem : {

} palign(8)

.stack : {

} palign(8)

} > OCRAM

GROUP : {

.irqstack : {

. = . + __IRQ_STACK_SIZE;

} align(8)

RUN_START(__IRQ_STACK_START)

RUN_END(__IRQ_STACK_END)

.fiqstack : {

. = . + __FIQ_STACK_SIZE;

} align(8)

RUN_START(__FIQ_STACK_START)

RUN_END(__FIQ_STACK_END)

.svcstack : {

. = . + __SVC_STACK_SIZE;

} align(8)

RUN_START(__SVC_STACK_START)

RUN_END(__SVC_STACK_END)

.abortstack : {

. = . + __ABORT_STACK_SIZE;

} align(8)

RUN_START(__ABORT_STACK_START)

RUN_END(__ABORT_STACK_END)

.undefinedstack : {

. = . + __UNDEFINED_STACK_SIZE;

} align(8)

RUN_START(__UNDEFINED_STACK_START)

RUN_END(__UNDEFINED_STACK_END)

} > OCRAM

GROUP : {

.ARM.exidx : {

} palign(8)

.init_array : {

} palign(8)

.fini_array : {

} palign(8)

} > OCRAM

.bss.user_shared_mem (NOLOAD) : {

} > USER_SHM_MEM

.bss.log_shared_mem (NOLOAD) : {

} > LOG_SHM_MEM

.bss.ipc_vring_mem (NOLOAD) : {

} > RTOS_NORTOS_IPC_SHM_MEM

.bss.sipc_hsm_queue_mem (NOLOAD) : {

} > MAILBOX_HSM

.bss.sipc_secure_host_queue_mem (NOLOAD) : {

} > MAILBOX_R5F

}

MEMORY

{

R5F_VECS : ORIGIN = 0x0 , LENGTH = 0x40

R5F_TCMA : ORIGIN = 0x40 , LENGTH = 0x7FC0

R5F_TCMB : ORIGIN = 0x80000 , LENGTH = 0x8000

SBL : ORIGIN = 0x70000000 , LENGTH = 0x40000

OCRAM : ORIGIN = 0x70040000 , LENGTH = 0x50000

USER_SHM_MEM : ORIGIN = 0x701D0000 , LENGTH = 0x4000

LOG_SHM_MEM : ORIGIN = 0x701D4000 , LENGTH = 0x4000

FLASH : ORIGIN = 0x60000000 , LENGTH = 0xF0000

RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x72000000 , LENGTH = 0x3E80

MAILBOX_HSM : ORIGIN = 0x44000000 , LENGTH = 0x3CE

MAILBOX_R5F : ORIGIN = 0x44000400 , LENGTH = 0x3CE

/* For memory Regions not defined in this core but shared by other cores with the current core */

}

0 Olivier Hepler 15 days ago in reply to Shaunak Deshpande

Prodigy 155 points

Hi,

here is the sysconfig file:

/**

* These arguments were used when this file was generated. They will be automatically applied on subsequent loads

* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.

* @cliArgs --device "AM263Px" --part "AM263P4" --package "ZCZ_S" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM263Px@11.00.00"

* @v2CliArgs --device "AM263P4-Q1" --package "NFBGA (ZCZ-S)" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM263Px@11.00.00"

* @versions {"tool":"1.25.0+4268"}

/**

* Import the modules used in this configuration.

const eeprom = scripting.addModule("/board/eeprom/eeprom", {}, false);

const eeprom1 = eeprom.addInstance();

const flash = scripting.addModule("/board/flash/flash", {}, false);

const flash1 = flash.addInstance();

const hsmclient = scripting.addModule("/drivers/hsmclient/hsmclient", {}, false);

const hsmclient1 = hsmclient.addInstance();

const i2c = scripting.addModule("/drivers/i2c/i2c", {}, false);

const i2c1 = i2c.addInstance();

const i2c2 = i2c.addInstance();

const debug_log = scripting.addModule("/kernel/dpl/debug_log");

const dpl_cfg = scripting.addModule("/kernel/dpl/dpl_cfg");

const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false);

const mpu_armv71 = mpu_armv7.addInstance();

const mpu_armv72 = mpu_armv7.addInstance();

const mpu_armv73 = mpu_armv7.addInstance();

const mpu_armv74 = mpu_armv7.addInstance();

const mpu_armv75 = mpu_armv7.addInstance();

const default_linker = scripting.addModule("/memory_configurator/default_linker", {}, false);

const default_linker1 = default_linker.addInstance();

const general = scripting.addModule("/memory_configurator/general", {}, false);

const general1 = general.addInstance();

const region = scripting.addModule("/memory_configurator/region", {}, false);

const region1 = region.addInstance();

const section = scripting.addModule("/memory_configurator/section", {}, false);

const section1 = section.addInstance();

const section2 = section.addInstance();

const section3 = section.addInstance();

const section4 = section.addInstance();

const section5 = section.addInstance();

const section6 = section.addInstance();

const section7 = section.addInstance();

const section8 = section.addInstance();

const section9 = section.addInstance();

const section10 = section.addInstance();

const section11 = section.addInstance();

const section12 = section.addInstance();

/**

* Write custom configuration values to the imported modules.

eeprom1.$name = "CONFIG_EEPROM0";

flash1.$name = "CONFIG_FLASH0";

flash1.enableFlashReset = true;

flash1.peripheralDriver.$name = "CONFIG_OSPI0";

flash1.peripheralDriver.dmaEnable = true;

flash1.peripheralDriver.phyEnable = true;

flash1.peripheralDriver.OSPI.CLK.$assign = "OSPI0_CLK";

flash1.peripheralDriver.OSPI.CSn0.$assign = "OSPI0_CSn0";

flash1.peripheralDriver.OSPI.DQS.$assign = "UART1_TXD";

flash1.peripheralDriver.OSPI.D7.$assign = "MCAN1_TX";

flash1.peripheralDriver.OSPI.D6.$assign = "MCAN1_RX";

flash1.peripheralDriver.OSPI.D5.$assign = "MCAN0_TX";

flash1.peripheralDriver.OSPI.D4.$assign = "MCAN0_RX";

flash1.peripheralDriver.OSPI.D3.$assign = "OSPI0_D3";

flash1.peripheralDriver.OSPI.D2.$assign = "OSPI0_D2";

flash1.peripheralDriver.OSPI.D1.$assign = "OSPI0_D1";

flash1.peripheralDriver.OSPI.D0.$assign = "OSPI0_D0";

flash1.peripheralDriver.OSPI.RESET_OUT0.$assign = "EPWM10_B";

flash1.peripheralDriver.child.$name = "drivers_ospi_v0_ospi_v0_am263px_template0";

const edma = scripting.addModule("/drivers/edma/edma", {}, false);

const edma1 = edma.addInstance({}, false);

edma1.$name = "CONFIG_EDMA0";

flash1.peripheralDriver.edmaDriver = edma1;

edma1.edmaRmDmaCh[0].$name = "CONFIG_EDMA_RM0";

edma1.edmaRmQdmaCh[0].$name = "CONFIG_EDMA_RM1";

edma1.edmaRmTcc[0].$name = "CONFIG_EDMA_RM2";

edma1.edmaRmParam[0].$name = "CONFIG_EDMA_RM3";

hsmclient1.$name = "CONFIG_HSMCLIENT0";

i2c1.$name = "CONFIG_I2C0";

i2c1.bitRate = "100KHZ";

i2c1.I2C.$assign = "I2C2";

i2c1.I2C.SCL.$assign = "UART0_RTSn";

i2c1.I2C.SDA.$assign = "UART0_CTSn";

i2c1.I2C_child.$name = "drivers_i2c_v1_i2c_v1_template0";

i2c2.$name = "CONFIG_I2C1";

eeprom1.peripheralDriver = i2c2;

i2c2.I2C.$assign = "I2C0";

i2c2.I2C_child.$name = "drivers_i2c_v1_i2c_v1_template1";

debug_log.enableUartLog = true;

debug_log.enableMemLog = true;

debug_log.enableLogZoneError = false;

debug_log.enableLogZoneWarning = false;

debug_log.uartLog.$name = "CONFIG_UART0";

debug_log.uartLog.UART.$assign = "UART0";

debug_log.uartLog.UART.RXD.$assign = "UART0_RXD";

debug_log.uartLog.UART.TXD.$assign = "UART0_TXD";

debug_log.uartLog.child.$name = "drivers_uart_v2_uart_v2_template0";

mpu_armv71.$name = "CONFIG_MPU_REGION0";

mpu_armv71.size = 31;

mpu_armv71.attributes = "Device";

mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD";

mpu_armv71.allowExecute = false;

mpu_armv72.$name = "CONFIG_MPU_REGION1";

mpu_armv72.size = 15;

mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD";

mpu_armv73.$name = "CONFIG_MPU_REGION2";

mpu_armv73.baseAddr = 0x80000;

mpu_armv73.size = 15;

mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD";

mpu_armv74.$name = "CONFIG_MPU_REGION3";

mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD";

mpu_armv74.baseAddr = 0x70000000;

mpu_armv74.size = 22;

mpu_armv75.$name = "CONFIG_MPU_REGION4";

mpu_armv75.baseAddr = 0xCE000000;

mpu_armv75.attributes = "Device";

mpu_armv75.size = 25;

default_linker1.$name = "memory_configurator_default_linker0";

general1.$name = "CONFIG_GENERAL0";

general1.linker.$name = "TIARMCLANG0";

region1.$name = "MEMORY_REGION_CONFIGURATION0";

region1.memory_region.create(11);

region1.memory_region[0].type = "TCMA";

region1.memory_region[0].$name = "R5F_VECS";

region1.memory_region[0].size = 0x40;

region1.memory_region[0].auto = false;

region1.memory_region[1].type = "TCMA";

region1.memory_region[1].$name = "R5F_TCMA";

region1.memory_region[1].size = 0x7FC0;

region1.memory_region[2].type = "TCMB";

region1.memory_region[2].size = 0x8000;

region1.memory_region[2].$name = "R5F_TCMB";

region1.memory_region[3].$name = "SBL";

region1.memory_region[3].auto = false;

region1.memory_region[3].size = 0x40000;

region1.memory_region[4].$name = "OCRAM";

region1.memory_region[4].manualStartAddress = 0x70040000;

region1.memory_region[4].auto = false;

region1.memory_region[4].size = 0x50000;

region1.memory_region[5].type = "FLASH";

region1.memory_region[5].auto = false;

region1.memory_region[5].$name = "FLASH";

region1.memory_region[5].size = 0xF0000;

region1.memory_region[6].$name = "USER_SHM_MEM";

region1.memory_region[6].auto = false;

region1.memory_region[6].manualStartAddress = 0x701D0000;

region1.memory_region[6].size = 0x4000;

region1.memory_region[6].isShared = true;

region1.memory_region[6].shared_cores = ["r5fss0-1","r5fss1-0","r5fss1-1"];

region1.memory_region[7].$name = "LOG_SHM_MEM";

region1.memory_region[7].auto = false;

region1.memory_region[7].manualStartAddress = 0x701D4000;

region1.memory_region[7].size = 0x4000;

region1.memory_region[7].isShared = true;

region1.memory_region[7].shared_cores = ["r5fss0-1","r5fss1-0","r5fss1-1"];

region1.memory_region[8].type = "CUSTOM";

region1.memory_region[8].$name = "RTOS_NORTOS_IPC_SHM_MEM";

region1.memory_region[8].auto = false;

region1.memory_region[8].manualStartAddress = 0x72000000;

region1.memory_region[8].size = 0x3E80;

region1.memory_region[8].isShared = true;

region1.memory_region[8].shared_cores = ["r5fss0-1","r5fss1-0","r5fss1-1"];

region1.memory_region[9].type = "CUSTOM";

region1.memory_region[9].$name = "MAILBOX_HSM";

region1.memory_region[9].auto = false;

region1.memory_region[9].manualStartAddress = 0x44000000;

region1.memory_region[9].size = 0x3CE;

region1.memory_region[9].isShared = true;

region1.memory_region[9].shared_cores = ["r5fss0-1","r5fss1-0","r5fss1-1"];

region1.memory_region[10].type = "CUSTOM";

region1.memory_region[10].$name = "MAILBOX_R5F";

region1.memory_region[10].auto = false;

region1.memory_region[10].manualStartAddress = 0x44000400;

region1.memory_region[10].size = 0x3CE;

region1.memory_region[10].isShared = true;

region1.memory_region[10].shared_cores = ["r5fss0-1","r5fss1-0","r5fss1-1"];

section1.load_memory = "R5F_VECS";

section1.group = false;

section1.$name = "Vector Table";

section1.output_section.create(1);

section1.output_section[0].$name = ".vectors";

section1.output_section[0].palignment = true;

section2.load_memory = "OCRAM";

section2.$name = "Text Segments";

section2.output_section.create(5);

section2.output_section[0].$name = ".text.hwi";

section2.output_section[0].palignment = true;

section2.output_section[1].$name = ".text.cache";

section2.output_section[1].palignment = true;

section2.output_section[2].$name = ".text.mpu";

section2.output_section[2].palignment = true;

section2.output_section[3].$name = ".text.boot";

section2.output_section[3].palignment = true;

section2.output_section[4].$name = ".text:abort";

section2.output_section[4].palignment = true;

section3.load_memory = "OCRAM";

section3.$name = "Code and Read-Only Data";

section3.select_multiple_regions = true;

section3.output_section.create(2);

section3.output_section[0].$name = ".text";

section3.output_section[0].palignment = true;

section3.output_section[1].$name = ".rodata";

section3.output_section[1].palignment = true;

section3.split_priority[0].$name = "Memory Region0";

section3.split_priority[0].load_memory = "OCRAM";

section4.load_memory = "OCRAM";

section4.$name = "Data Segment";

section4.output_section.create(1);

section4.output_section[0].$name = ".data";

section4.output_section[0].palignment = true;

section5.load_memory = "OCRAM";

section5.$name = "Memory Segments";

section5.output_section.create(3);

section5.output_section[0].$name = ".bss";

section5.output_section[0].output_sections_start = "__BSS_START";

section5.output_section[0].output_sections_end = "__BSS_END";

section5.output_section[0].palignment = true;

section5.output_section[1].$name = ".sysmem";

section5.output_section[1].palignment = true;

section5.output_section[2].$name = ".stack";

section5.output_section[2].palignment = true;

section6.load_memory = "OCRAM";

section6.$name = "Stack Segments";

section6.output_section.create(5);

section6.output_section[0].$name = ".irqstack";

section6.output_section[0].output_sections_start = "__IRQ_STACK_START";

section6.output_section[0].output_sections_end = "__IRQ_STACK_END";

section6.output_section[0].input_section.create(1);

section6.output_section[0].input_section[0].$name = ". = . + __IRQ_STACK_SIZE;";

section6.output_section[1].$name = ".fiqstack";

section6.output_section[1].output_sections_start = "__FIQ_STACK_START";

section6.output_section[1].output_sections_end = "__FIQ_STACK_END";

section6.output_section[1].input_section.create(1);

section6.output_section[1].input_section[0].$name = ". = . + __FIQ_STACK_SIZE;";

section6.output_section[2].$name = ".svcstack";

section6.output_section[2].output_sections_start = "__SVC_STACK_START";

section6.output_section[2].output_sections_end = "__SVC_STACK_END";

section6.output_section[2].input_section.create(1);

section6.output_section[2].input_section[0].$name = ". = . + __SVC_STACK_SIZE;";

section6.output_section[3].$name = ".abortstack";

section6.output_section[3].output_sections_start = "__ABORT_STACK_START";

section6.output_section[3].output_sections_end = "__ABORT_STACK_END";

section6.output_section[3].input_section.create(1);

section6.output_section[3].input_section[0].$name = ". = . + __ABORT_STACK_SIZE;";

section6.output_section[4].$name = ".undefinedstack";

section6.output_section[4].output_sections_start = "__UNDEFINED_STACK_START";

section6.output_section[4].output_sections_end = "__UNDEFINED_STACK_END";

section6.output_section[4].input_section.create(1);

section6.output_section[4].input_section[0].$name = ". = . + __UNDEFINED_STACK_SIZE;";

section7.load_memory = "OCRAM";

section7.$name = "Initialization and Exception Handling";

section7.output_section.create(3);

section7.output_section[0].$name = ".ARM.exidx";

section7.output_section[0].palignment = true;

section7.output_section[1].$name = ".init_array";

section7.output_section[1].palignment = true;

section7.output_section[2].$name = ".fini_array";

section7.output_section[2].palignment = true;

section8.load_memory = "USER_SHM_MEM";

section8.type = "NOLOAD";

section8.$name = "User Shared Memory";

section8.group = false;

section8.output_section.create(1);

section8.output_section[0].$name = ".bss.user_shared_mem";

section8.output_section[0].alignment = 0;

section9.load_memory = "LOG_SHM_MEM";

section9.$name = "Log Shared Memory";

section9.group = false;

section9.type = "NOLOAD";

section9.output_section.create(1);

section9.output_section[0].$name = ".bss.log_shared_mem";

section9.output_section[0].alignment = 0;

section10.load_memory = "RTOS_NORTOS_IPC_SHM_MEM";

section10.type = "NOLOAD";

section10.$name = "IPC Shared Memory";

section10.group = false;

section10.output_section.create(1);

section10.output_section[0].$name = ".bss.ipc_vring_mem";

section10.output_section[0].alignment = 0;

section11.load_memory = "MAILBOX_HSM";

section11.type = "NOLOAD";

section11.$name = "SIPC HSM Queue Memory";

section11.group = false;

section11.output_section.create(1);

section11.output_section[0].$name = ".bss.sipc_hsm_queue_mem";

section11.output_section[0].alignment = 0;

section12.load_memory = "MAILBOX_R5F";

section12.$name = "SIPC R5F Queue Memory";

section12.group = false;

section12.type = "NOLOAD";

section12.output_section.create(1);

section12.output_section[0].$name = ".bss.sipc_secure_host_queue_mem";

section12.output_section[0].alignment = 0;

/**

* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future

* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to

* re-solve from scratch.

flash1.peripheralDriver.OSPI.$suggestSolution = "OSPI0";

i2c2.I2C.SCL.$suggestSolution = "I2C0_SCL";

i2c2.I2C.SDA.$suggestSolution = "I2C0_SDA";

0 Shaunak Deshpande 12 days ago in reply to Olivier Hepler

TI__Mastermind 19202 points

Hi,

Thanks for the information,

Will it be possible for you to share your application so I can debug it, or parallely, can you please share:

1. Map file

2. When abort occurs, in disassembly, go to lr-8 instruction in the disassembly file. And see the instruction that was executed, and

open your registers window in CCS, get the values for IFAR, IFSR, SPSR, PRC, SP and (LR-8) register from the R5F CPU core registers

Based on this, we can exactly see what caused the abort.

Regards,
Shaunak

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