Part Number: AM6442
Other Parts Discussed in Thread: SYSCONFIG
Hello,
I am working with AM6442, SDK-->11.2.0.24 and SysConfig-->1.25.0 Ethernet peripherals (CPSW and ICSSG) and would like to gain a deeper understanding of the MDIO configuration operating modes available in SysConfig, specifically what each mode means and which parts of the system behavior they affect. I could not find sufficiently detailed explanations in the SDK documentation regarding how these modes differ internally, both at driver and hardware levels.
Under SysConfig → MDIO Config → Operating Mode, the following modes are available:
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MDIO_MODE_NORMAL
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MDIO_MODE_MANUAL
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MDIO_MODE_STATE_CHANGE_MON
My current understanding is as follows:
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MDIO_MODE_NORMAL: The driver fully manages the PHY via MDIO, including reset, auto-negotiation, speed/duplex configuration, and link status monitoring.
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MDIO_MODE_MANUAL: MDC and MDIO are enabled, but automatic PHY management is disabled, and all PHY register accesses and initialization sequences are handled by the application.
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MDIO_MODE_STATE_CHANGE_MON: MDIO register access is disabled, and this mode is intended only to monitor PHY link state changes.
However, I would like to better understand what exactly changes internally when switching between these modes — specifically which hardware signals, driver features, or firmware mechanisms are enabled or disabled in each case.
In particular, when MDIO_MODE_STATE_CHANGE_MON is selected and “Enable MDIO MDC Config” is disabled, SysConfig removes the MDC and MDIO pins from the pinmux configuration. While this behavior makes sense electrically, the following points are not entirely clear to me:
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When MDC and MDIO are disabled, how does the CPSW / ICSSG Ethernet subsystem obtain PHY link up/down status, speed, and duplex information?
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Are these parameters derived purely from the MAC–PHY interface signals (such as RGMII / SGMII / MII),
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or is there a different monitoring or state-machine mechanism implemented inside the CPSW / ICSSG firmware or driver?
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In MDIO_MODE_STATE_CHANGE_MON, is it assumed that the PHY is:
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Already configured via strap pins, and/or
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Managed by another MAC instance that owns the MDIO master role?
In this mode, can the MAC port be considered a purely passive observer with respect to PHY management?
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Is it technically correct to state that MDIO is strictly a management bus, and that Ethernet data transmission and reception (TX/RX frame traffic) are completely independent of MDIO, which would explain why disabling MDC/MDIO does not prevent normal Ethernet data operation?
In addition, I would also like to understand the differences between Switch mode and Dual MAC mode for CPSW and ICSSG Ethernet. Specifically:
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What are the key differences between these modes at the hardware, firmware, and driver levels?
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How do MAC addressing, MDIO usage, NETIF structure, and inter-port data forwarding differ between Switch mode and Dual MAC mode?
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For which use cases is Switch mode recommended, and for which scenarios is Dual MAC mode the intended configuration?
I was not able to find sufficiently detailed explanations for these topics in the SDK documentation, and I would like to ensure that my understanding of the intended CPSW / ICSSG Ethernet architecture and configuration model aligns with TI’s design.
Thank you in advance for your clarification.