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AM2632: How to read one response of external device via UART by invoking API "UART_read" twice under UART DMA mode?

Zhang Xun
Prodigy 40 points

Part Number: AM2632

Hello TI team,

I' m trying to receive one response of external device via UART by invoking API "UART_read" twice under UART DMA mode. Because the data length of external device is varied, and the fourth and fifth bytes are the data length of current response. So I want to read the first five bytes and calculate the data length of this response, then I will read the rest bytes of this response. For now, I found that I can't read the rest bytes when I invoke the API  "UART_read". Please help me to implement this feature, Thanks for your help.

 

The screenshot below is an example of the external device response.

image.png

The screenshot below is the UART configurations in our project.

  • 0
    TI__Expert 7336 points

    Hello,

    Could you please share the code of your current implementation and what error you're seeing with it?

    Thanks,

    Sahana

  • 0 in reply to Sahana H G
    Prodigy 40 points

    Hello Sahana,

    The screenshot below is my current implementation. And I set a breakpoint at the second "UART_read", the length of rest data is same with the example above. The error is that the second "UART_read" will not return. UART configurations are in the text content above.

    Another phenomenon I found, if I click the refresh button in register window the UART_RXFIFO_LVL register value will decrease to 0. Is this reasonable? In my opinion, after the first UART read finished the EDMA will not copy data from UART RX FIFO. So why this  UART_RXFIFO_LVL register value will decrease to 0? Is this related to the issues about the second  "UART_read" will not return?

  • 0 in reply to Zhang Xun
    TI__Expert 7336 points

    Hello,

    Is it possible to have a call to further debug this?

    Thanks,

    Sahana

  • 0 in reply to Sahana H G
    Prodigy 40 points

    Hello Sahana,

    The TXT files are the register value when the second read is failed.

    Fullscreen EDMA.txt Download 
    EDMA0_TPCC.TPCC_ABCNT: 0x00000000
EDMA0_TPCC.TPCC_AETCMD: 0x00000000
EDMA0_TPCC.TPCC_AETCTL: 0x00000000
EDMA0_TPCC.TPCC_AETSTAT: 0x00000000
EDMA0_TPCC.TPCC_BIDX: 0x00000000
EDMA0_TPCC.TPCC_CCCFG: 0x03314445
EDMA0_TPCC.TPCC_CCERR: 0x00000000
EDMA0_TPCC.TPCC_CCERRCLR: 0x00000000
EDMA0_TPCC.TPCC_CCNT: 0x00000000
EDMA0_TPCC.TPCC_CCSTAT: 0x00000000
EDMA0_TPCC.TPCC_CER: 0x00000000
EDMA0_TPCC.TPCC_CERH: 0x00000000
EDMA0_TPCC.TPCC_CERH_RN: 0x00000000
EDMA0_TPCC.TPCC_CER_RN: 0x00000000
EDMA0_TPCC.TPCC_CIDX: 0x00000000
EDMA0_TPCC.TPCC_DCHMAPN: 0x00000000
EDMA0_TPCC.TPCC_DMAQNUMN: 0x00001000
EDMA0_TPCC.TPCC_DRAEHM: 0x000000FF
EDMA0_TPCC.TPCC_DRAEM: 0xFFFFFFFF
EDMA0_TPCC.TPCC_DST: 0x00000000
EDMA0_TPCC.TPCC_ECR: 0x00000000
EDMA0_TPCC.TPCC_ECRH: 0x00000000
EDMA0_TPCC.TPCC_ECRH_RN: 0x00000000
EDMA0_TPCC.TPCC_ECR_RN: 0x00000000
EDMA0_TPCC.TPCC_EECR: 0x00000000
EDMA0_TPCC.TPCC_EECRH: 0x00000000
EDMA0_TPCC.TPCC_EECRH_RN: 0x00000000
EDMA0_TPCC.TPCC_EECR_RN: 0x00000000
EDMA0_TPCC.TPCC_EER: 0x00000018
EDMA0_TPCC.TPCC_EERH: 0x00000000
EDMA0_TPCC.TPCC_EERH_RN: 0x00000000
EDMA0_TPCC.TPCC_EER_RN: 0x00000018
EDMA0_TPCC.TPCC_EESR: 0x00000000
EDMA0_TPCC.TPCC_EESRH: 0x00000000
EDMA0_TPCC.TPCC_EESRH_RN: 0x00000000
EDMA0_TPCC.TPCC_EESR_RN: 0x00000000
EDMA0_TPCC.TPCC_EEVAL: 0x00000000
EDMA0_TPCC.TPCC_EMCR: 0x00000000
EDMA0_TPCC.TPCC_EMCRH: 0x00000000
EDMA0_TPCC.TPCC_EMR: 0x00000000
EDMA0_TPCC.TPCC_EMRH: 0x00000000
EDMA0_TPCC.TPCC_ER: 0x00000000
EDMA0_TPCC.TPCC_ERH: 0x00000000
EDMA0_TPCC.TPCC_ERH_RN: 0x00000000
EDMA0_TPCC.TPCC_ER_RN: 0x00000000
EDMA0_TPCC.TPCC_ESR: 0x00000000
EDMA0_TPCC.TPCC_ESRH: 0x00000000
EDMA0_TPCC.TPCC_ESRH_RN: 0x00000000
EDMA0_TPCC.TPCC_ESR_RN: 0x00000000
EDMA0_TPCC.TPCC_ICR: 0x00000000
EDMA0_TPCC.TPCC_ICRH: 0x00000000
EDMA0_TPCC.TPCC_ICRH_RN: 0x00000000
EDMA0_TPCC.TPCC_ICR_RN: 0x00000000
EDMA0_TPCC.TPCC_IECR: 0x00000000
EDMA0_TPCC.TPCC_IECRH: 0x00000000
EDMA0_TPCC.TPCC_IECRH_RN: 0x00000000
EDMA0_TPCC.TPCC_IECR_RN: 0x00000000
EDMA0_TPCC.TPCC_IER: 0x0000000F
EDMA0_TPCC.TPCC_IERH: 0x00000000
EDMA0_TPCC.TPCC_IERH_RN: 0x00000000
EDMA0_TPCC.TPCC_IER_RN: 0x0000000F
EDMA0_TPCC.TPCC_IESR: 0x00000000
EDMA0_TPCC.TPCC_IESRH: 0x00000000
EDMA0_TPCC.TPCC_IESRH_RN: 0x00000000
EDMA0_TPCC.TPCC_IESR_RN: 0x00000000
EDMA0_TPCC.TPCC_IEVAL: 0x00000000
EDMA0_TPCC.TPCC_IEVAL_RN: 0x00000000
EDMA0_TPCC.TPCC_IPR: 0x00000000
EDMA0_TPCC.TPCC_IPRH: 0x00000000
EDMA0_TPCC.TPCC_IPRH_RN: 0x00000000
EDMA0_TPCC.TPCC_IPR_RN: 0x00000000
EDMA0_TPCC.TPCC_LNK: 0x0000FFFF
EDMA0_TPCC.TPCC_OPT: 0x00000000
EDMA0_TPCC.TPCC_PID: 0x4001B300
EDMA0_TPCC.TPCC_QCHMAPN: 0x00000000
EDMA0_TPCC.TPCC_QDMAQNUM: 0x00000000
EDMA0_TPCC.TPCC_QEECR: 0x00000000
EDMA0_TPCC.TPCC_QEECR_RN: 0x00000000
EDMA0_TPCC.TPCC_QEER: 0x00000000
EDMA0_TPCC.TPCC_QEER_RN: 0x00000000
EDMA0_TPCC.TPCC_QEESR: 0x00000000
EDMA0_TPCC.TPCC_QEESR_RN: 0x00000000
EDMA0_TPCC.TPCC_QEMCR: 0x00000000
EDMA0_TPCC.TPCC_QEMR: 0x00000000
EDMA0_TPCC.TPCC_QER: 0x00000000
EDMA0_TPCC.TPCC_QER_RN: 0x00000000
EDMA0_TPCC.TPCC_QNE0: 0x00000000
EDMA0_TPCC.TPCC_QNE1: 0x00000000
EDMA0_TPCC.TPCC_QNE2: 0x00000000
EDMA0_TPCC.TPCC_QNE3: 0x00000000
EDMA0_TPCC.TPCC_QNE4: 0x00000000
EDMA0_TPCC.TPCC_QNE5: 0x00000000
EDMA0_TPCC.TPCC_QNE6: 0x00000000
EDMA0_TPCC.TPCC_QNE7: 0x00000000
EDMA0_TPCC.TPCC_QNE8: 0x00000000
EDMA0_TPCC.TPCC_QNE9: 0x00000000
EDMA0_TPCC.TPCC_QNE10: 0x00000000
EDMA0_TPCC.TPCC_QNE11: 0x00000000
EDMA0_TPCC.TPCC_QNE12: 0x00000000
EDMA0_TPCC.TPCC_QNE13: 0x00000000
 
 
EDMA0_TPTC.TPTC_PID: 0x40000B01
EDMA0_TPTC.TPTC_TCCFG: 0x00000214
EDMA0_TPTC.TPTC_TCSTAT: 0x00000900
EDMA0_TPTC.TPTC_INTSTAT: 0x00000003
EDMA0_TPTC.TPTC_INTEN: 0x00000000
EDMA0_TPTC.TPTC_INTCLR: 0x00000000
EDMA0_TPTC.TPTC_INTCMD: 0x00000000
EDMA0_TPTC.TPTC_ERRSTAT: 0x00000000
EDMA0_TPTC.TPTC_ERREN: 0x00000000
EDMA0_TPTC.TPTC_ERRCLR: 0x00000000
EDMA0_TPTC.TPTC_ERRDET: 0x00000000
EDMA0_TPTC.TPTC_ERRCMD: 0x00000000
EDMA0_TPTC.TPTC_RDRATE: 0x00000000
EDMA0_TPTC.TPTC_POPT: 0x00000000
EDMA0_TPTC.TPTC_PSRC: 0x00000000
EDMA0_TPTC.TPTC_PCNT: 0x00010001
EDMA0_TPTC.TPTC_PDST: 0x70176184
EDMA0_TPTC.TPTC_PBIDX: 0x00010000
EDMA0_TPTC.TPTC_PMPPRXY: 0x00000104
EDMA0_TPTC.TPTC_SAOPT: 0x00101000
EDMA0_TPTC.TPTC_SASRC: 0x52300000
EDMA0_TPTC.TPTC_SACNT: 0x00000001
EDMA0_TPTC.TPTC_SADST: 0x00000000
EDMA0_TPTC.TPTC_SABIDX: 0x00010000
EDMA0_TPTC.TPTC_SAMPPRXY: 0x00000104
EDMA0_TPTC.TPTC_SACNTRLD: 0x00000001
EDMA0_TPTC.TPTC_SASRCBREF: 0x52300000
EDMA0_TPTC.TPTC_SADSTBREF: 0x00000000
EDMA0_TPTC.TPTC_SABCNT: 0x00000000
EDMA0_TPTC.TPTC_DFCNTRLD: 0x00000001
EDMA0_TPTC.TPTC_DFSRCBREF: 0x00000000
EDMA0_TPTC.TPTC_DFOPT0: 0x00001000
EDMA0_TPTC.TPTC_DFSRC0: 0x00000000
EDMA0_TPTC.TPTC_DFACNT0: 0x00000001
EDMA0_TPTC.TPTC_DFDST0: 0x70176183
EDMA0_TPTC.TPTC_DFBIDX0: 0x00010000
EDMA0_TPTC.TPTC_DFMPPRXY0: 0x00000104
EDMA0_TPTC.TPTC_DFBCNT0: 0x00000001
EDMA0_TPTC.TPTC_DFOPT1: 0x00101000
EDMA0_TPTC.TPTC_DFSRC1: 0x00000000
EDMA0_TPTC.TPTC_DFACNT1: 0x00000000
EDMA0_TPTC.TPTC_DFDST1: 0x70176184
EDMA0_TPTC.TPTC_DFBIDX1: 0x00010000
EDMA0_TPTC.TPTC_DFMPPRXY1: 0x00000104
EDMA0_TPTC.TPTC_DFBCNT1: 0x00000000
 
EDMA1_TPTC.TPTC_PID: 0x40000B01
EDMA1_TPTC.TPTC_TCCFG: 0x00000214
EDMA1_TPTC.TPTC_TCSTAT: 0x00001900
EDMA1_TPTC.TPTC_INTSTAT: 0x00000003
EDMA1_TPTC.TPTC_INTEN: 0x00000000
EDMA1_TPTC.TPTC_INTCLR: 0x00000000
EDMA1_TPTC.TPTC_INTCMD: 0x00000000
EDMA1_TPTC.TPTC_ERRSTAT: 0x00000000
EDMA1_TPTC.TPTC_ERREN: 0x00000000
EDMA1_TPTC.TPTC_ERRCLR: 0x00000000
EDMA1_TPTC.TPTC_ERRDET: 0x00000000
EDMA1_TPTC.TPTC_ERRCMD: 0x00000000
EDMA1_TPTC.TPTC_RDRATE: 0x00000000
EDMA1_TPTC.TPTC_POPT: 0x00104000
EDMA1_TPTC.TPTC_PSRC: 0x68000000
EDMA1_TPTC.TPTC_PCNT: 0x00011000
EDMA1_TPTC.TPTC_PDST: 0x7016DF00
EDMA1_TPTC.TPTC_PBIDX: 0x00000000
EDMA1_TPTC.TPTC_PMPPRXY: 0x00000104
EDMA1_TPTC.TPTC_SAOPT: 0x00104000
EDMA1_TPTC.TPTC_SASRC: 0x68000FE0
EDMA1_TPTC.TPTC_SACNT: 0x00001000
EDMA1_TPTC.TPTC_SADST: 0x00000000
EDMA1_TPTC.TPTC_SABIDX: 0x00000000
EDMA1_TPTC.TPTC_SAMPPRXY: 0x00000104
EDMA1_TPTC.TPTC_SACNTRLD: 0x00001000
EDMA1_TPTC.TPTC_SASRCBREF: 0x68000000
EDMA1_TPTC.TPTC_SADSTBREF: 0x00000000
EDMA1_TPTC.TPTC_SABCNT: 0x00000000
EDMA1_TPTC.TPTC_DFCNTRLD: 0x00001000
EDMA1_TPTC.TPTC_DFSRCBREF: 0x00000000
EDMA1_TPTC.TPTC_DFOPT0: 0x00104000
EDMA1_TPTC.TPTC_DFSRC0: 0x00000000
EDMA1_TPTC.TPTC_DFACNT0: 0x00001000
EDMA1_TPTC.TPTC_DFDST0: 0x7016DF00
EDMA1_TPTC.TPTC_DFBIDX0: 0x00000000
EDMA1_TPTC.TPTC_DFMPPRXY0: 0x00000104
EDMA1_TPTC.TPTC_DFBCNT0: 0x00000001
EDMA1_TPTC.TPTC_DFOPT1: 0x00104000
EDMA1_TPTC.TPTC_DFSRC1: 0x00000000
EDMA1_TPTC.TPTC_DFACNT1: 0x00001000
EDMA1_TPTC.TPTC_DFDST1: 0x7016DF00
EDMA1_TPTC.TPTC_DFBIDX1: 0x00000000
EDMA1_TPTC.TPTC_DFMPPRXY1: 0x00000104
EDMA1_TPTC.TPTC_DFBCNT1: 0x00000001
    Fullscreen UART0.txt Download 
    UART0.UART_DLL: 0x00000000
UART0.UART_RHR: 0x00000000
UART0.UART_THR: 0x00000000
UART0.UART_DLH: 0x00000000
UART0.UART_IER_CIR: 0x00000000
UART0.UART_IER_IRDA: 0x00000000
UART0.UART_IER_UART: 0x00000000
UART0.UART_EFR: 0x000000C1
UART0.UART_FCR: 0x000000C1
UART0.UART_IIR_CIR: 0x000000C1
UART0.UART_IIR_IRDA: 0x000000C1
UART0.UART_IIR_UART: 0x000000C1
UART0.UART_LCR: 0x00000003
UART0.UART_MCR: 0x00000000
UART0.UART_XON1_ADDR1: 0x00000000
UART0.UART_LSR_CIR: 0x00000060
UART0.UART_LSR_IRDA: 0x00000060
UART0.UART_LSR_UART: 0x00000060
UART0.UART_XON2_ADDR2: 0x00000060
UART0.UART_MSR: 0x00000010
UART0.UART_TCR: 0x00000010
UART0.UART_XOFF1: 0x00000010
UART0.UART_SPR: 0x00000000
UART0.UART_TLR: 0x00000000
UART0.UART_XOFF2: 0x00000000
UART0.UART_MDR1: 0x00000000
UART0.UART_MDR2: 0x00000000
UART0.UART_SFLSR: 0x00000000
UART0.UART_TXFLL: 0x00000000
UART0.UART_RESUME: 0x00000000
UART0.UART_TXFLH: 0x00000000
UART0.UART_RXFLL: 0x00000000
UART0.UART_SFREGL: 0x00000000
UART0.UART_RXFLH: 0x00000000
UART0.UART_SFREGH: 0x00000000
UART0.UART_BLR: 0x00000040
UART0.UART_UASR: 0x00000040
UART0.UART_ACREG: 0x00000000
UART0.UART_SCR: 0x000000C0
UART0.UART_SSR: 0x00000004
UART0.UART_EBLR: 0x00000000
UART0.UART_MVR: 0x47424603
UART0.UART_SYSC: 0x00000000
UART0.UART_SYSS: 0x00000001
UART0.UART_WER: 0x000000FF
UART0.UART_CFPS: 0x00000069
UART0.UART_RXFIFO_LVL: 0x00000000
UART0.UART_TXFIFO_LVL: 0x00000000
UART0.UART_IER2: 0x00000000
UART0.UART_ISR2: 0x00000003
UART0.UART_FREQ_SEL: 0x0000001A
UART0.UART_ABAUD_1ST_CHAR: 0x00000000
UART0.UART_BAUD_2ND_CHAR: 0x00000000
UART0.UART_MDR3: 0x00000000
UART0.UART_TX_DMA_THRESHOLD: 0x00000000
UART0.UART_MDR4: 0x00000000
UART0.UART_EFR2: 0x00000000
UART0.UART_ECR: 0x00000018
UART0.UART_TIMEGUARD: 0x00000000
UART0.UART_TIMEOUTL: 0x00000000
UART0.UART_TIMEOUTH: 0x00000000
UART0.UART_SCCR: 0x00000007
UART0.UART_ERHR: 0x00000000
UART0.UART_ETHR: 0x00000000
UART0.UART_MAR: 0x00000000
UART0.UART_MMR: 0x00000000
UART0.UART_MBR: 0x00000000

  • 0 in reply to Zhang Xun
    Prodigy 40 points

    Hello Sahana,

    The TXT files below are the register value in the first read.

    Fullscreen UART0_second_read.txt Download 
    UART0.UART_DLL: 0x00000000
UART0.UART_RHR: 0x00000000
UART0.UART_THR: 0x00000000
UART0.UART_DLH: 0x00000000
UART0.UART_IER_CIR: 0x00000000
UART0.UART_IER_IRDA: 0x00000000
UART0.UART_IER_UART: 0x00000000
UART0.UART_EFR: 0x000000C1
UART0.UART_FCR: 0x000000C1
UART0.UART_IIR_CIR: 0x000000C1
UART0.UART_IIR_IRDA: 0x000000C1
UART0.UART_IIR_UART: 0x000000C1
UART0.UART_LCR: 0x00000003
UART0.UART_MCR: 0x00000000
UART0.UART_XON1_ADDR1: 0x00000000
UART0.UART_LSR_CIR: 0x00000060
UART0.UART_LSR_IRDA: 0x00000060
UART0.UART_LSR_UART: 0x00000060
UART0.UART_XON2_ADDR2: 0x00000060
UART0.UART_MSR: 0x00000010
UART0.UART_TCR: 0x00000010
UART0.UART_XOFF1: 0x00000010
UART0.UART_SPR: 0x00000000
UART0.UART_TLR: 0x00000000
UART0.UART_XOFF2: 0x00000000
UART0.UART_MDR1: 0x00000000
UART0.UART_MDR2: 0x00000000
UART0.UART_SFLSR: 0x00000000
UART0.UART_TXFLL: 0x00000000
UART0.UART_RESUME: 0x00000000
UART0.UART_TXFLH: 0x00000000
UART0.UART_RXFLL: 0x00000000
UART0.UART_SFREGL: 0x00000000
UART0.UART_RXFLH: 0x00000000
UART0.UART_SFREGH: 0x00000000
UART0.UART_BLR: 0x00000040
UART0.UART_UASR: 0x00000040
UART0.UART_ACREG: 0x00000000
UART0.UART_SCR: 0x000000C0
UART0.UART_SSR: 0x00000004
UART0.UART_EBLR: 0x00000000
UART0.UART_MVR: 0x47424603
UART0.UART_SYSC: 0x00000000
UART0.UART_SYSS: 0x00000001
UART0.UART_WER: 0x000000FF
UART0.UART_CFPS: 0x00000069
UART0.UART_RXFIFO_LVL: 0x00000000
UART0.UART_TXFIFO_LVL: 0x00000000
UART0.UART_IER2: 0x00000000
UART0.UART_ISR2: 0x00000003
UART0.UART_FREQ_SEL: 0x0000001A
UART0.UART_ABAUD_1ST_CHAR: 0x00000000
UART0.UART_BAUD_2ND_CHAR: 0x00000000
UART0.UART_MDR3: 0x00000000
UART0.UART_TX_DMA_THRESHOLD: 0x00000000
UART0.UART_MDR4: 0x00000000
UART0.UART_EFR2: 0x00000000
UART0.UART_ECR: 0x00000018
UART0.UART_TIMEGUARD: 0x00000000
UART0.UART_TIMEOUTL: 0x00000000
UART0.UART_TIMEOUTH: 0x00000000
UART0.UART_SCCR: 0x00000007
UART0.UART_ERHR: 0x00000000
UART0.UART_ETHR: 0x00000000
UART0.UART_MAR: 0x00000000
UART0.UART_MMR: 0x00000000
UART0.UART_MBR: 0x00000000
    Fullscreen EDMA_second_read.txt Download 
    EDMA0_TPCC.TPCC_ABCNT: 0x00000000
EDMA0_TPCC.TPCC_AETCMD: 0x00000000
EDMA0_TPCC.TPCC_AETCTL: 0x00000000
EDMA0_TPCC.TPCC_AETSTAT: 0x00000000
EDMA0_TPCC.TPCC_BIDX: 0x00000000
EDMA0_TPCC.TPCC_CCCFG: 0x03314445
EDMA0_TPCC.TPCC_CCERR: 0x00000000
EDMA0_TPCC.TPCC_CCERRCLR: 0x00000000
EDMA0_TPCC.TPCC_CCNT: 0x00000000
EDMA0_TPCC.TPCC_CCSTAT: 0x00000000
EDMA0_TPCC.TPCC_CER: 0x00000000
EDMA0_TPCC.TPCC_CERH: 0x00000000
EDMA0_TPCC.TPCC_CERH_RN: 0x00000000
EDMA0_TPCC.TPCC_CER_RN: 0x00000000
EDMA0_TPCC.TPCC_CIDX: 0x00000000
EDMA0_TPCC.TPCC_DCHMAPN: 0x00000000
EDMA0_TPCC.TPCC_DMAQNUMN: 0x00001000
EDMA0_TPCC.TPCC_DRAEHM: 0x000000FF
EDMA0_TPCC.TPCC_DRAEM: 0xFFFFFFFF
EDMA0_TPCC.TPCC_DST: 0x00000000
EDMA0_TPCC.TPCC_ECR: 0x00000000
EDMA0_TPCC.TPCC_ECRH: 0x00000000
EDMA0_TPCC.TPCC_ECRH_RN: 0x00000000
EDMA0_TPCC.TPCC_ECR_RN: 0x00000000
EDMA0_TPCC.TPCC_EECR: 0x00000000
EDMA0_TPCC.TPCC_EECRH: 0x00000000
EDMA0_TPCC.TPCC_EECRH_RN: 0x00000000
EDMA0_TPCC.TPCC_EECR_RN: 0x00000000
EDMA0_TPCC.TPCC_EER: 0x00000018
EDMA0_TPCC.TPCC_EERH: 0x00000000
EDMA0_TPCC.TPCC_EERH_RN: 0x00000000
EDMA0_TPCC.TPCC_EER_RN: 0x00000018
EDMA0_TPCC.TPCC_EESR: 0x00000000
EDMA0_TPCC.TPCC_EESRH: 0x00000000
EDMA0_TPCC.TPCC_EESRH_RN: 0x00000000
EDMA0_TPCC.TPCC_EESR_RN: 0x00000000
EDMA0_TPCC.TPCC_EEVAL: 0x00000000
EDMA0_TPCC.TPCC_EMCR: 0x00000000
EDMA0_TPCC.TPCC_EMCRH: 0x00000000
EDMA0_TPCC.TPCC_EMR: 0x00000000
EDMA0_TPCC.TPCC_EMRH: 0x00000000
EDMA0_TPCC.TPCC_ER: 0x00000000
EDMA0_TPCC.TPCC_ERH: 0x00000000
EDMA0_TPCC.TPCC_ERH_RN: 0x00000000
EDMA0_TPCC.TPCC_ER_RN: 0x00000000
EDMA0_TPCC.TPCC_ESR: 0x00000000
EDMA0_TPCC.TPCC_ESRH: 0x00000000
EDMA0_TPCC.TPCC_ESRH_RN: 0x00000000
EDMA0_TPCC.TPCC_ESR_RN: 0x00000000
EDMA0_TPCC.TPCC_ICR: 0x00000000
EDMA0_TPCC.TPCC_ICRH: 0x00000000
EDMA0_TPCC.TPCC_ICRH_RN: 0x00000000
EDMA0_TPCC.TPCC_ICR_RN: 0x00000000
EDMA0_TPCC.TPCC_IECR: 0x00000000
EDMA0_TPCC.TPCC_IECRH: 0x00000000
EDMA0_TPCC.TPCC_IECRH_RN: 0x00000000
EDMA0_TPCC.TPCC_IECR_RN: 0x00000000
EDMA0_TPCC.TPCC_IER: 0x0000000F
EDMA0_TPCC.TPCC_IERH: 0x00000000
EDMA0_TPCC.TPCC_IERH_RN: 0x00000000
EDMA0_TPCC.TPCC_IER_RN: 0x0000000F
EDMA0_TPCC.TPCC_IESR: 0x00000000
EDMA0_TPCC.TPCC_IESRH: 0x00000000
EDMA0_TPCC.TPCC_IESRH_RN: 0x00000000
EDMA0_TPCC.TPCC_IESR_RN: 0x00000000
EDMA0_TPCC.TPCC_IEVAL: 0x00000000
EDMA0_TPCC.TPCC_IEVAL_RN: 0x00000000
EDMA0_TPCC.TPCC_IPR: 0x00000000
EDMA0_TPCC.TPCC_IPRH: 0x00000000
EDMA0_TPCC.TPCC_IPRH_RN: 0x00000000
EDMA0_TPCC.TPCC_IPR_RN: 0x00000000
EDMA0_TPCC.TPCC_LNK: 0x0000FFFF
EDMA0_TPCC.TPCC_OPT: 0x00000000
EDMA0_TPCC.TPCC_PID: 0x4001B300
EDMA0_TPCC.TPCC_QCHMAPN: 0x00000000
EDMA0_TPCC.TPCC_QDMAQNUM: 0x00000000
EDMA0_TPCC.TPCC_QEECR: 0x00000000
EDMA0_TPCC.TPCC_QEECR_RN: 0x00000000
EDMA0_TPCC.TPCC_QEER: 0x00000000
EDMA0_TPCC.TPCC_QEER_RN: 0x00000000
EDMA0_TPCC.TPCC_QEESR: 0x00000000
EDMA0_TPCC.TPCC_QEESR_RN: 0x00000000
EDMA0_TPCC.TPCC_QEMCR: 0x00000000
EDMA0_TPCC.TPCC_QEMR: 0x00000000
EDMA0_TPCC.TPCC_QER: 0x00000000
EDMA0_TPCC.TPCC_QER_RN: 0x00000000
EDMA0_TPCC.TPCC_QNE0: 0x00000000
EDMA0_TPCC.TPCC_QNE1: 0x00000000
EDMA0_TPCC.TPCC_QNE2: 0x00000000
EDMA0_TPCC.TPCC_QNE3: 0x00000000
EDMA0_TPCC.TPCC_QNE4: 0x00000000
EDMA0_TPCC.TPCC_QNE5: 0x00000000
EDMA0_TPCC.TPCC_QNE6: 0x00000000
EDMA0_TPCC.TPCC_QNE7: 0x00000000
EDMA0_TPCC.TPCC_QNE8: 0x00000000
EDMA0_TPCC.TPCC_QNE9: 0x00000000
EDMA0_TPCC.TPCC_QNE10: 0x00000000
EDMA0_TPCC.TPCC_QNE11: 0x00000000
EDMA0_TPCC.TPCC_QNE12: 0x00000000
EDMA0_TPCC.TPCC_QNE13: 0x00000000
 
 
EDMA0_TPTC.TPTC_PID: 0x40000B01
EDMA0_TPTC.TPTC_TCCFG: 0x00000214
EDMA0_TPTC.TPTC_TCSTAT: 0x00000900
EDMA0_TPTC.TPTC_INTSTAT: 0x00000003
EDMA0_TPTC.TPTC_INTEN: 0x00000000
EDMA0_TPTC.TPTC_INTCLR: 0x00000000
EDMA0_TPTC.TPTC_INTCMD: 0x00000000
EDMA0_TPTC.TPTC_ERRSTAT: 0x00000000
EDMA0_TPTC.TPTC_ERREN: 0x00000000
EDMA0_TPTC.TPTC_ERRCLR: 0x00000000
EDMA0_TPTC.TPTC_ERRDET: 0x00000000
EDMA0_TPTC.TPTC_ERRCMD: 0x00000000
EDMA0_TPTC.TPTC_RDRATE: 0x00000000
EDMA0_TPTC.TPTC_POPT: 0x00000000
EDMA0_TPTC.TPTC_PSRC: 0x00000000
EDMA0_TPTC.TPTC_PCNT: 0x00010001
EDMA0_TPTC.TPTC_PDST: 0x70176184
EDMA0_TPTC.TPTC_PBIDX: 0x00010000
EDMA0_TPTC.TPTC_PMPPRXY: 0x00000104
EDMA0_TPTC.TPTC_SAOPT: 0x00101000
EDMA0_TPTC.TPTC_SASRC: 0x52300000
EDMA0_TPTC.TPTC_SACNT: 0x00000001
EDMA0_TPTC.TPTC_SADST: 0x00000000
EDMA0_TPTC.TPTC_SABIDX: 0x00010000
EDMA0_TPTC.TPTC_SAMPPRXY: 0x00000104
EDMA0_TPTC.TPTC_SACNTRLD: 0x00000001
EDMA0_TPTC.TPTC_SASRCBREF: 0x52300000
EDMA0_TPTC.TPTC_SADSTBREF: 0x00000000
EDMA0_TPTC.TPTC_SABCNT: 0x00000000
EDMA0_TPTC.TPTC_DFCNTRLD: 0x00000001
EDMA0_TPTC.TPTC_DFSRCBREF: 0x00000000
EDMA0_TPTC.TPTC_DFOPT0: 0x00001000
EDMA0_TPTC.TPTC_DFSRC0: 0x00000000
EDMA0_TPTC.TPTC_DFACNT0: 0x00000001
EDMA0_TPTC.TPTC_DFDST0: 0x70176183
EDMA0_TPTC.TPTC_DFBIDX0: 0x00010000
EDMA0_TPTC.TPTC_DFMPPRXY0: 0x00000104
EDMA0_TPTC.TPTC_DFBCNT0: 0x00000001
EDMA0_TPTC.TPTC_DFOPT1: 0x00101000
EDMA0_TPTC.TPTC_DFSRC1: 0x00000000
EDMA0_TPTC.TPTC_DFACNT1: 0x00000000
EDMA0_TPTC.TPTC_DFDST1: 0x70176184
EDMA0_TPTC.TPTC_DFBIDX1: 0x00010000
EDMA0_TPTC.TPTC_DFMPPRXY1: 0x00000104
EDMA0_TPTC.TPTC_DFBCNT1: 0x00000000
 
EDMA1_TPTC.TPTC_PID: 0x40000B01
EDMA1_TPTC.TPTC_TCCFG: 0x00000214
EDMA1_TPTC.TPTC_TCSTAT: 0x00001900
EDMA1_TPTC.TPTC_INTSTAT: 0x00000003
EDMA1_TPTC.TPTC_INTEN: 0x00000000
EDMA1_TPTC.TPTC_INTCLR: 0x00000000
EDMA1_TPTC.TPTC_INTCMD: 0x00000000
EDMA1_TPTC.TPTC_ERRSTAT: 0x00000000
EDMA1_TPTC.TPTC_ERREN: 0x00000000
EDMA1_TPTC.TPTC_ERRCLR: 0x00000000
EDMA1_TPTC.TPTC_ERRDET: 0x00000000
EDMA1_TPTC.TPTC_ERRCMD: 0x00000000
EDMA1_TPTC.TPTC_RDRATE: 0x00000000
EDMA1_TPTC.TPTC_POPT: 0x00104000
EDMA1_TPTC.TPTC_PSRC: 0x68000000
EDMA1_TPTC.TPTC_PCNT: 0x00011000
EDMA1_TPTC.TPTC_PDST: 0x7016DF00
EDMA1_TPTC.TPTC_PBIDX: 0x00000000
EDMA1_TPTC.TPTC_PMPPRXY: 0x00000104
EDMA1_TPTC.TPTC_SAOPT: 0x00104000
EDMA1_TPTC.TPTC_SASRC: 0x68000FE0
EDMA1_TPTC.TPTC_SACNT: 0x00001000
EDMA1_TPTC.TPTC_SADST: 0x00000000
EDMA1_TPTC.TPTC_SABIDX: 0x00000000
EDMA1_TPTC.TPTC_SAMPPRXY: 0x00000104
EDMA1_TPTC.TPTC_SACNTRLD: 0x00001000
EDMA1_TPTC.TPTC_SASRCBREF: 0x68000000
EDMA1_TPTC.TPTC_SADSTBREF: 0x00000000
EDMA1_TPTC.TPTC_SABCNT: 0x00000000
EDMA1_TPTC.TPTC_DFCNTRLD: 0x00001000
EDMA1_TPTC.TPTC_DFSRCBREF: 0x00000000
EDMA1_TPTC.TPTC_DFOPT0: 0x00104000
EDMA1_TPTC.TPTC_DFSRC0: 0x00000000
EDMA1_TPTC.TPTC_DFACNT0: 0x00001000
EDMA1_TPTC.TPTC_DFDST0: 0x7016DF00
EDMA1_TPTC.TPTC_DFBIDX0: 0x00000000
EDMA1_TPTC.TPTC_DFMPPRXY0: 0x00000104
EDMA1_TPTC.TPTC_DFBCNT0: 0x00000001
EDMA1_TPTC.TPTC_DFOPT1: 0x00104000
EDMA1_TPTC.TPTC_DFSRC1: 0x00000000
EDMA1_TPTC.TPTC_DFACNT1: 0x00001000
EDMA1_TPTC.TPTC_DFDST1: 0x7016DF00
EDMA1_TPTC.TPTC_DFBIDX1: 0x00000000
EDMA1_TPTC.TPTC_DFMPPRXY1: 0x00000104
EDMA1_TPTC.TPTC_DFBCNT1: 0x00000001

  • 0 in reply to Zhang Xun
    TI__Expert 7336 points

    Hi Xun Zhang,

    Please allow me some time to review and get back to you by early next week.

    Thanks,

    Sahana

  • 0 in reply to Zhang Xun
    TI__Expert 7336 points

    Hi,

    I see exact same values in the files attached, could you please recheck if you've uploaded the correct files?

  • 0 in reply to Sahana H G
    Prodigy 40 points

    Hello Sahana,

    I have checked the data in UART register in both read, they are same But there is some wrong data in EDMA registers files. And I upload the correct files below.

    Fullscreen EDMA_first_read.txt Download 
    EDMA0_TPCC.TPCC_ABCNT: 0x00000000
EDMA0_TPCC.TPCC_AETCMD: 0x00000000
EDMA0_TPCC.TPCC_AETCTL: 0x00000000
EDMA0_TPCC.TPCC_AETSTAT: 0x00000000
EDMA0_TPCC.TPCC_BIDX: 0x00000000
EDMA0_TPCC.TPCC_CCCFG: 0x03314445
EDMA0_TPCC.TPCC_CCERR: 0x00000000
EDMA0_TPCC.TPCC_CCERRCLR: 0x00000000
EDMA0_TPCC.TPCC_CCNT: 0x00000000
EDMA0_TPCC.TPCC_CCSTAT: 0x00000000
EDMA0_TPCC.TPCC_CER: 0x00000000
EDMA0_TPCC.TPCC_CERH: 0x00000000
EDMA0_TPCC.TPCC_CERH_RN: 0x00000000
EDMA0_TPCC.TPCC_CER_RN: 0x00000000
EDMA0_TPCC.TPCC_CIDX: 0x00000000
EDMA0_TPCC.TPCC_DCHMAPN: 0x00000000
EDMA0_TPCC.TPCC_DMAQNUMN: 0x00001000
EDMA0_TPCC.TPCC_DRAEHM: 0x000000FF
EDMA0_TPCC.TPCC_DRAEM: 0xFFFFFFFF
EDMA0_TPCC.TPCC_DST: 0x00000000
EDMA0_TPCC.TPCC_ECR: 0x00000000
EDMA0_TPCC.TPCC_ECRH: 0x00000000
EDMA0_TPCC.TPCC_ECRH_RN: 0x00000000
EDMA0_TPCC.TPCC_ECR_RN: 0x00000000
EDMA0_TPCC.TPCC_EECR: 0x00000000
EDMA0_TPCC.TPCC_EECRH: 0x00000000
EDMA0_TPCC.TPCC_EECRH_RN: 0x00000000
EDMA0_TPCC.TPCC_EECR_RN: 0x00000000
EDMA0_TPCC.TPCC_EER: 0x00000018
EDMA0_TPCC.TPCC_EERH: 0x00000000
EDMA0_TPCC.TPCC_EERH_RN: 0x00000000
EDMA0_TPCC.TPCC_EER_RN: 0x00000018
EDMA0_TPCC.TPCC_EESR: 0x00000000
EDMA0_TPCC.TPCC_EESRH: 0x00000000
EDMA0_TPCC.TPCC_EESRH_RN: 0x00000000
EDMA0_TPCC.TPCC_EESR_RN: 0x00000000
EDMA0_TPCC.TPCC_EEVAL: 0x00000000
EDMA0_TPCC.TPCC_EMCR: 0x00000000
EDMA0_TPCC.TPCC_EMCRH: 0x00000000
EDMA0_TPCC.TPCC_EMR: 0x00000000
EDMA0_TPCC.TPCC_EMRH: 0x00000000
EDMA0_TPCC.TPCC_ER: 0x00000000
EDMA0_TPCC.TPCC_ERH: 0x00000000
EDMA0_TPCC.TPCC_ERH_RN: 0x00000000
EDMA0_TPCC.TPCC_ER_RN: 0x00000000
EDMA0_TPCC.TPCC_ESR: 0x00000000
EDMA0_TPCC.TPCC_ESRH: 0x00000000
EDMA0_TPCC.TPCC_ESRH_RN: 0x00000000
EDMA0_TPCC.TPCC_ESR_RN: 0x00000000
EDMA0_TPCC.TPCC_ICR: 0x00000000
EDMA0_TPCC.TPCC_ICRH: 0x00000000
EDMA0_TPCC.TPCC_ICRH_RN: 0x00000000
EDMA0_TPCC.TPCC_ICR_RN: 0x00000000
EDMA0_TPCC.TPCC_IECR: 0x00000000
EDMA0_TPCC.TPCC_IECRH: 0x00000000
EDMA0_TPCC.TPCC_IECRH_RN: 0x00000000
EDMA0_TPCC.TPCC_IECR_RN: 0x00000000
EDMA0_TPCC.TPCC_IER: 0x0000000F
EDMA0_TPCC.TPCC_IERH: 0x00000000
EDMA0_TPCC.TPCC_IERH_RN: 0x00000000
EDMA0_TPCC.TPCC_IER_RN: 0x0000000F
EDMA0_TPCC.TPCC_IESR: 0x00000000
EDMA0_TPCC.TPCC_IESRH: 0x00000000
EDMA0_TPCC.TPCC_IESRH_RN: 0x00000000
EDMA0_TPCC.TPCC_IESR_RN: 0x00000000
EDMA0_TPCC.TPCC_IEVAL: 0x00000000
EDMA0_TPCC.TPCC_IEVAL_RN: 0x00000000
EDMA0_TPCC.TPCC_IPR: 0x00000000
EDMA0_TPCC.TPCC_IPRH: 0x00000000
EDMA0_TPCC.TPCC_IPRH_RN: 0x00000000
EDMA0_TPCC.TPCC_IPR_RN: 0x00000000
EDMA0_TPCC.TPCC_LNK: 0x0000FFFF
EDMA0_TPCC.TPCC_OPT: 0x00000000
EDMA0_TPCC.TPCC_PID: 0x4001B300
EDMA0_TPCC.TPCC_QCHMAPN: 0x00000000
EDMA0_TPCC.TPCC_QDMAQNUM: 0x00000000
EDMA0_TPCC.TPCC_QEECR: 0x00000000
EDMA0_TPCC.TPCC_QEECR_RN: 0x00000000
EDMA0_TPCC.TPCC_QEER: 0x00000000
EDMA0_TPCC.TPCC_QEER_RN: 0x00000000
EDMA0_TPCC.TPCC_QEESR: 0x00000000
EDMA0_TPCC.TPCC_QEESR_RN: 0x00000000
EDMA0_TPCC.TPCC_QEMCR: 0x00000000
EDMA0_TPCC.TPCC_QEMR: 0x00000000
EDMA0_TPCC.TPCC_QER: 0x00000000
EDMA0_TPCC.TPCC_QER_RN: 0x00000000
EDMA0_TPCC.TPCC_QNE0: 0x00000079
EDMA0_TPCC.TPCC_QNE1: 0x00000000
EDMA0_TPCC.TPCC_QNE2: 0x00000000
EDMA0_TPCC.TPCC_QNE3: 0x000000A8
EDMA0_TPCC.TPCC_QNE4: 0x00000040
EDMA0_TPCC.TPCC_QNE5: 0x00000000
EDMA0_TPCC.TPCC_QNE6: 0x00000000
EDMA0_TPCC.TPCC_QNE7: 0x00000020
EDMA0_TPCC.TPCC_QNE8: 0x000000D6
EDMA0_TPCC.TPCC_QNE9: 0x00000000
EDMA0_TPCC.TPCC_QNE10: 0x00000001
EDMA0_TPCC.TPCC_QNE11: 0x00000024
EDMA0_TPCC.TPCC_QNE12: 0x00000024
EDMA0_TPCC.TPCC_QNE13: 0x00000076

EDMA0_TPTC.TPTC_PID: 0x40000B01
EDMA0_TPTC.TPTC_TCCFG: 0x00000214
EDMA0_TPTC.TPTC_TCSTAT: 0x00000900
EDMA0_TPTC.TPTC_INTSTAT: 0x00000003
EDMA0_TPTC.TPTC_INTEN: 0x00000000
EDMA0_TPTC.TPTC_INTCLR: 0x00000000
EDMA0_TPTC.TPTC_INTCMD: 0x00000000
EDMA0_TPTC.TPTC_ERRSTAT: 0x00000000
EDMA0_TPTC.TPTC_ERREN: 0x00000000
EDMA0_TPTC.TPTC_ERRCLR: 0x00000000
EDMA0_TPTC.TPTC_ERRDET: 0x00000000
EDMA0_TPTC.TPTC_ERRCMD: 0x00000000
EDMA0_TPTC.TPTC_RDRATE: 0x00000000
EDMA0_TPTC.TPTC_POPT: 0x00001000
EDMA0_TPTC.TPTC_PSRC: 0x52300000
EDMA0_TPTC.TPTC_PCNT: 0x00010001
EDMA0_TPTC.TPTC_PDST: 0x70176181
EDMA0_TPTC.TPTC_PBIDX: 0x00010000
EDMA0_TPTC.TPTC_PMPPRXY: 0x00000104
EDMA0_TPTC.TPTC_SAOPT: 0x00001000
EDMA0_TPTC.TPTC_SASRC: 0x52300000
EDMA0_TPTC.TPTC_SACNT: 0x00000001
EDMA0_TPTC.TPTC_SADST: 0x00000000
EDMA0_TPTC.TPTC_SABIDX: 0x00010000
EDMA0_TPTC.TPTC_SAMPPRXY: 0x00000104
EDMA0_TPTC.TPTC_SACNTRLD: 0x00000001
EDMA0_TPTC.TPTC_SASRCBREF: 0x52300000
EDMA0_TPTC.TPTC_SADSTBREF: 0x00000000
EDMA0_TPTC.TPTC_SABCNT: 0x00000000
EDMA0_TPTC.TPTC_DFCNTRLD: 0x00000001
EDMA0_TPTC.TPTC_DFSRCBREF: 0x00000000
EDMA0_TPTC.TPTC_DFOPT0: 0x00001000
EDMA0_TPTC.TPTC_DFSRC0: 0x00000000
EDMA0_TPTC.TPTC_DFACNT0: 0x00000001
EDMA0_TPTC.TPTC_DFDST0: 0x70176180
EDMA0_TPTC.TPTC_DFBIDX0: 0x00010000
EDMA0_TPTC.TPTC_DFMPPRXY0: 0x00000104
EDMA0_TPTC.TPTC_DFBCNT0: 0x00000001
EDMA0_TPTC.TPTC_DFOPT1: 0x00001000
EDMA0_TPTC.TPTC_DFSRC1: 0x00000000
EDMA0_TPTC.TPTC_DFACNT1: 0x00000000
EDMA0_TPTC.TPTC_DFDST1: 0x70176181
EDMA0_TPTC.TPTC_DFBIDX1: 0x00010000
EDMA0_TPTC.TPTC_DFMPPRXY1: 0x00000104
EDMA0_TPTC.TPTC_DFBCNT1: 0x00000000

EDMA1_TPTC.TPTC_PID: 0x40000B01
EDMA1_TPTC.TPTC_TCCFG: 0x00000214
EDMA1_TPTC.TPTC_TCSTAT: 0x00001100
EDMA1_TPTC.TPTC_INTSTAT: 0x00000003
EDMA1_TPTC.TPTC_INTEN: 0x00000000
EDMA1_TPTC.TPTC_INTCLR: 0x00000000
EDMA1_TPTC.TPTC_INTCMD: 0x00000000
EDMA1_TPTC.TPTC_ERRSTAT: 0x00000000
EDMA1_TPTC.TPTC_ERREN: 0x00000000
EDMA1_TPTC.TPTC_ERRCLR: 0x00000000
EDMA1_TPTC.TPTC_ERRDET: 0x00000000
EDMA1_TPTC.TPTC_ERRCMD: 0x00000000
EDMA1_TPTC.TPTC_RDRATE: 0x00000000
EDMA1_TPTC.TPTC_POPT: 0x00002000
EDMA1_TPTC.TPTC_PSRC: 0x00000000
EDMA1_TPTC.TPTC_PCNT: 0x00010001
EDMA1_TPTC.TPTC_PDST: 0x52300000
EDMA1_TPTC.TPTC_PBIDX: 0x00000001
EDMA1_TPTC.TPTC_PMPPRXY: 0x00000104
EDMA1_TPTC.TPTC_SAOPT: 0x00102000
EDMA1_TPTC.TPTC_SASRC: 0x70176287
EDMA1_TPTC.TPTC_SACNT: 0x00000001
EDMA1_TPTC.TPTC_SADST: 0x00000000
EDMA1_TPTC.TPTC_SABIDX: 0x00000001
EDMA1_TPTC.TPTC_SAMPPRXY: 0x00000104
EDMA1_TPTC.TPTC_SACNTRLD: 0x00000001
EDMA1_TPTC.TPTC_SASRCBREF: 0x70176287
EDMA1_TPTC.TPTC_SADSTBREF: 0x00000000
EDMA1_TPTC.TPTC_SABCNT: 0x00000000
EDMA1_TPTC.TPTC_DFCNTRLD: 0x00000001
EDMA1_TPTC.TPTC_DFSRCBREF: 0x00000000
EDMA1_TPTC.TPTC_DFOPT0: 0x00002000
EDMA1_TPTC.TPTC_DFSRC0: 0x00000000
EDMA1_TPTC.TPTC_DFACNT0: 0x00000001
EDMA1_TPTC.TPTC_DFDST0: 0x52300000
EDMA1_TPTC.TPTC_DFBIDX0: 0x00000001
EDMA1_TPTC.TPTC_DFMPPRXY0: 0x00000104
EDMA1_TPTC.TPTC_DFBCNT0: 0x00000001
EDMA1_TPTC.TPTC_DFOPT1: 0x00002000
EDMA1_TPTC.TPTC_DFSRC1: 0x00000000
EDMA1_TPTC.TPTC_DFACNT1: 0x00000001
EDMA1_TPTC.TPTC_DFDST1: 0x52300000
EDMA1_TPTC.TPTC_DFBIDX1: 0x00000001
EDMA1_TPTC.TPTC_DFMPPRXY1: 0x00000104
EDMA1_TPTC.TPTC_DFBCNT1: 0x00000001
    Fullscreen 3527.EDMA_second_read.txt Download 
    EDMA0_TPCC.TPCC_ABCNT: 0x00000000
EDMA0_TPCC.TPCC_AETCMD: 0x00000000
EDMA0_TPCC.TPCC_AETCTL: 0x00000000
EDMA0_TPCC.TPCC_AETSTAT: 0x00000000
EDMA0_TPCC.TPCC_BIDX: 0x00000000
EDMA0_TPCC.TPCC_CCCFG: 0x03314445
EDMA0_TPCC.TPCC_CCERR: 0x00000000
EDMA0_TPCC.TPCC_CCERRCLR: 0x00000000
EDMA0_TPCC.TPCC_CCNT: 0x00000000
EDMA0_TPCC.TPCC_CCSTAT: 0x00000000
EDMA0_TPCC.TPCC_CER: 0x00000000
EDMA0_TPCC.TPCC_CERH: 0x00000000
EDMA0_TPCC.TPCC_CERH_RN: 0x00000000
EDMA0_TPCC.TPCC_CER_RN: 0x00000000
EDMA0_TPCC.TPCC_CIDX: 0x00000000
EDMA0_TPCC.TPCC_DCHMAPN: 0x00000000
EDMA0_TPCC.TPCC_DMAQNUMN: 0x00001000
EDMA0_TPCC.TPCC_DRAEHM: 0x000000FF
EDMA0_TPCC.TPCC_DRAEM: 0xFFFFFFFF
EDMA0_TPCC.TPCC_DST: 0x00000000
EDMA0_TPCC.TPCC_ECR: 0x00000000
EDMA0_TPCC.TPCC_ECRH: 0x00000000
EDMA0_TPCC.TPCC_ECRH_RN: 0x00000000
EDMA0_TPCC.TPCC_ECR_RN: 0x00000000
EDMA0_TPCC.TPCC_EECR: 0x00000000
EDMA0_TPCC.TPCC_EECRH: 0x00000000
EDMA0_TPCC.TPCC_EECRH_RN: 0x00000000
EDMA0_TPCC.TPCC_EECR_RN: 0x00000000
EDMA0_TPCC.TPCC_EER: 0x00000018
EDMA0_TPCC.TPCC_EERH: 0x00000000
EDMA0_TPCC.TPCC_EERH_RN: 0x00000000
EDMA0_TPCC.TPCC_EER_RN: 0x00000018
EDMA0_TPCC.TPCC_EESR: 0x00000000
EDMA0_TPCC.TPCC_EESRH: 0x00000000
EDMA0_TPCC.TPCC_EESRH_RN: 0x00000000
EDMA0_TPCC.TPCC_EESR_RN: 0x00000000
EDMA0_TPCC.TPCC_EEVAL: 0x00000000
EDMA0_TPCC.TPCC_EMCR: 0x00000000
EDMA0_TPCC.TPCC_EMCRH: 0x00000000
EDMA0_TPCC.TPCC_EMR: 0x00000000
EDMA0_TPCC.TPCC_EMRH: 0x00000000
EDMA0_TPCC.TPCC_ER: 0x00000000
EDMA0_TPCC.TPCC_ERH: 0x00000000
EDMA0_TPCC.TPCC_ERH_RN: 0x00000000
EDMA0_TPCC.TPCC_ER_RN: 0x00000000
EDMA0_TPCC.TPCC_ESR: 0x00000000
EDMA0_TPCC.TPCC_ESRH: 0x00000000
EDMA0_TPCC.TPCC_ESRH_RN: 0x00000000
EDMA0_TPCC.TPCC_ESR_RN: 0x00000000
EDMA0_TPCC.TPCC_ICR: 0x00000000
EDMA0_TPCC.TPCC_ICRH: 0x00000000
EDMA0_TPCC.TPCC_ICRH_RN: 0x00000000
EDMA0_TPCC.TPCC_ICR_RN: 0x00000000
EDMA0_TPCC.TPCC_IECR: 0x00000000
EDMA0_TPCC.TPCC_IECRH: 0x00000000
EDMA0_TPCC.TPCC_IECRH_RN: 0x00000000
EDMA0_TPCC.TPCC_IECR_RN: 0x00000000
EDMA0_TPCC.TPCC_IER: 0x0000000F
EDMA0_TPCC.TPCC_IERH: 0x00000000
EDMA0_TPCC.TPCC_IERH_RN: 0x00000000
EDMA0_TPCC.TPCC_IER_RN: 0x0000000F
EDMA0_TPCC.TPCC_IESR: 0x00000000
EDMA0_TPCC.TPCC_IESRH: 0x00000000
EDMA0_TPCC.TPCC_IESRH_RN: 0x00000000
EDMA0_TPCC.TPCC_IESR_RN: 0x00000000
EDMA0_TPCC.TPCC_IEVAL: 0x00000000
EDMA0_TPCC.TPCC_IEVAL_RN: 0x00000000
EDMA0_TPCC.TPCC_IPR: 0x00000000
EDMA0_TPCC.TPCC_IPRH: 0x00000000
EDMA0_TPCC.TPCC_IPRH_RN: 0x00000000
EDMA0_TPCC.TPCC_IPR_RN: 0x00000000
EDMA0_TPCC.TPCC_LNK: 0x0000FFFF
EDMA0_TPCC.TPCC_OPT: 0x00000000
EDMA0_TPCC.TPCC_PID: 0x4001B300
EDMA0_TPCC.TPCC_QCHMAPN: 0x00000000
EDMA0_TPCC.TPCC_QDMAQNUM: 0x00000000
EDMA0_TPCC.TPCC_QEECR: 0x00000000
EDMA0_TPCC.TPCC_QEECR_RN: 0x00000000
EDMA0_TPCC.TPCC_QEER: 0x00000000
EDMA0_TPCC.TPCC_QEER_RN: 0x00000000
EDMA0_TPCC.TPCC_QEESR: 0x00000000
EDMA0_TPCC.TPCC_QEESR_RN: 0x00000000
EDMA0_TPCC.TPCC_QEMCR: 0x00000000
EDMA0_TPCC.TPCC_QEMR: 0x00000000
EDMA0_TPCC.TPCC_QER: 0x00000000
EDMA0_TPCC.TPCC_QER_RN: 0x00000000
EDMA0_TPCC.TPCC_QNE0: 0x00000079
EDMA0_TPCC.TPCC_QNE1: 0x00000000
EDMA0_TPCC.TPCC_QNE2: 0x00000000
EDMA0_TPCC.TPCC_QNE3: 0x000000A8
EDMA0_TPCC.TPCC_QNE4: 0x00000040
EDMA0_TPCC.TPCC_QNE5: 0x00000000
EDMA0_TPCC.TPCC_QNE6: 0x00000000
EDMA0_TPCC.TPCC_QNE7: 0x00000020
EDMA0_TPCC.TPCC_QNE8: 0x000000D6
EDMA0_TPCC.TPCC_QNE9: 0x00000000
EDMA0_TPCC.TPCC_QNE10: 0x00000001
EDMA0_TPCC.TPCC_QNE11: 0x00000024
EDMA0_TPCC.TPCC_QNE12: 0x00000024
EDMA0_TPCC.TPCC_QNE13: 0x00000076

EDMA0_TPTC.TPTC_PID: 0x40000B01
EDMA0_TPTC.TPTC_TCCFG: 0x00000214
EDMA0_TPTC.TPTC_TCSTAT: 0x00000100
EDMA0_TPTC.TPTC_INTSTAT: 0x00000003
EDMA0_TPTC.TPTC_INTEN: 0x00000000
EDMA0_TPTC.TPTC_INTCLR: 0x00000000
EDMA0_TPTC.TPTC_INTCMD: 0x00000000
EDMA0_TPTC.TPTC_ERRSTAT: 0x00000000
EDMA0_TPTC.TPTC_ERREN: 0x00000000
EDMA0_TPTC.TPTC_ERRCLR: 0x00000000
EDMA0_TPTC.TPTC_ERRDET: 0x00000000
EDMA0_TPTC.TPTC_ERRCMD: 0x00000000
EDMA0_TPTC.TPTC_RDRATE: 0x00000000
EDMA0_TPTC.TPTC_POPT: 0x00001000
EDMA0_TPTC.TPTC_PSRC: 0x52300000
EDMA0_TPTC.TPTC_PCNT: 0x00010001
EDMA0_TPTC.TPTC_PDST: 0x70176181
EDMA0_TPTC.TPTC_PBIDX: 0x00010000
EDMA0_TPTC.TPTC_PMPPRXY: 0x00000104
EDMA0_TPTC.TPTC_SAOPT: 0x00001000
EDMA0_TPTC.TPTC_SASRC: 0x52300000
EDMA0_TPTC.TPTC_SACNT: 0x00000001
EDMA0_TPTC.TPTC_SADST: 0x00000000
EDMA0_TPTC.TPTC_SABIDX: 0x00010000
EDMA0_TPTC.TPTC_SAMPPRXY: 0x00000104
EDMA0_TPTC.TPTC_SACNTRLD: 0x00000001
EDMA0_TPTC.TPTC_SASRCBREF: 0x52300000
EDMA0_TPTC.TPTC_SADSTBREF: 0x00000000
EDMA0_TPTC.TPTC_SABCNT: 0x00000000
EDMA0_TPTC.TPTC_DFCNTRLD: 0x00000001
EDMA0_TPTC.TPTC_DFSRCBREF: 0x00000000
EDMA0_TPTC.TPTC_DFOPT0: 0x00001000
EDMA0_TPTC.TPTC_DFSRC0: 0x00000000
EDMA0_TPTC.TPTC_DFACNT0: 0x00000000
EDMA0_TPTC.TPTC_DFDST0: 0x70176181
EDMA0_TPTC.TPTC_DFBIDX0: 0x00010000
EDMA0_TPTC.TPTC_DFMPPRXY0: 0x00000104
EDMA0_TPTC.TPTC_DFBCNT0: 0x00000000
EDMA0_TPTC.TPTC_DFOPT1: 0x00001000
EDMA0_TPTC.TPTC_DFSRC1: 0x00000000
EDMA0_TPTC.TPTC_DFACNT1: 0x00000001
EDMA0_TPTC.TPTC_DFDST1: 0x70176183
EDMA0_TPTC.TPTC_DFBIDX1: 0x00010000
EDMA0_TPTC.TPTC_DFMPPRXY1: 0x00000104
EDMA0_TPTC.TPTC_DFBCNT1: 0x00000001

EDMA1_TPTC.TPTC_PID: 0x40000B01
EDMA1_TPTC.TPTC_TCCFG: 0x00000214
EDMA1_TPTC.TPTC_TCSTAT: 0x00001900
EDMA1_TPTC.TPTC_INTSTAT: 0x00000003
EDMA1_TPTC.TPTC_INTEN: 0x00000000
EDMA1_TPTC.TPTC_INTCLR: 0x00000000
EDMA1_TPTC.TPTC_INTCMD: 0x00000000
EDMA1_TPTC.TPTC_ERRSTAT: 0x00000000
EDMA1_TPTC.TPTC_ERREN: 0x00000000
EDMA1_TPTC.TPTC_ERRCLR: 0x00000000
EDMA1_TPTC.TPTC_ERRDET: 0x00000000
EDMA1_TPTC.TPTC_ERRCMD: 0x00000000
EDMA1_TPTC.TPTC_RDRATE: 0x00000000
EDMA1_TPTC.TPTC_POPT: 0x00104000
EDMA1_TPTC.TPTC_PSRC: 0x68000000
EDMA1_TPTC.TPTC_PCNT: 0x00011000
EDMA1_TPTC.TPTC_PDST: 0x7016DF00
EDMA1_TPTC.TPTC_PBIDX: 0x00000000
EDMA1_TPTC.TPTC_PMPPRXY: 0x00000104
EDMA1_TPTC.TPTC_SAOPT: 0x00104000
EDMA1_TPTC.TPTC_SASRC: 0x68000FE0
EDMA1_TPTC.TPTC_SACNT: 0x00001000
EDMA1_TPTC.TPTC_SADST: 0x00000000
EDMA1_TPTC.TPTC_SABIDX: 0x00000000
EDMA1_TPTC.TPTC_SAMPPRXY: 0x00000104
EDMA1_TPTC.TPTC_SACNTRLD: 0x00001000
EDMA1_TPTC.TPTC_SASRCBREF: 0x68000000
EDMA1_TPTC.TPTC_SADSTBREF: 0x00000000
EDMA1_TPTC.TPTC_SABCNT: 0x00000000
EDMA1_TPTC.TPTC_DFCNTRLD: 0x00001000
EDMA1_TPTC.TPTC_DFSRCBREF: 0x00000000
EDMA1_TPTC.TPTC_DFOPT0: 0x00104000
EDMA1_TPTC.TPTC_DFSRC0: 0x00000000
EDMA1_TPTC.TPTC_DFACNT0: 0x00001000
EDMA1_TPTC.TPTC_DFDST0: 0x7016DF00
EDMA1_TPTC.TPTC_DFBIDX0: 0x00000000
EDMA1_TPTC.TPTC_DFMPPRXY0: 0x00000104
EDMA1_TPTC.TPTC_DFBCNT0: 0x00000001
EDMA1_TPTC.TPTC_DFOPT1: 0x00104000
EDMA1_TPTC.TPTC_DFSRC1: 0x00000000
EDMA1_TPTC.TPTC_DFACNT1: 0x00001000
EDMA1_TPTC.TPTC_DFDST1: 0x7016DF00
EDMA1_TPTC.TPTC_DFBIDX1: 0x00000000
EDMA1_TPTC.TPTC_DFMPPRXY1: 0x00000104
EDMA1_TPTC.TPTC_DFBCNT1: 0x00000001
    Fullscreen 2860.UART0_second_read.txt Download 
    UART0.UART_DLL: 0x00000000
UART0.UART_RHR: 0x00000000
UART0.UART_THR: 0x00000000
UART0.UART_DLH: 0x00000000
UART0.UART_IER_CIR: 0x00000000
UART0.UART_IER_IRDA: 0x00000000
UART0.UART_IER_UART: 0x00000000
UART0.UART_EFR: 0x000000C1
UART0.UART_FCR: 0x000000C1
UART0.UART_IIR_CIR: 0x000000C1
UART0.UART_IIR_IRDA: 0x000000C1
UART0.UART_IIR_UART: 0x000000C1
UART0.UART_LCR: 0x00000003
UART0.UART_MCR: 0x00000000
UART0.UART_XON1_ADDR1: 0x00000000
UART0.UART_LSR_CIR: 0x00000060
UART0.UART_LSR_IRDA: 0x00000060
UART0.UART_LSR_UART: 0x00000060
UART0.UART_XON2_ADDR2: 0x00000060
UART0.UART_MSR: 0x00000010
UART0.UART_TCR: 0x00000010
UART0.UART_XOFF1: 0x00000010
UART0.UART_SPR: 0x00000000
UART0.UART_TLR: 0x00000000
UART0.UART_XOFF2: 0x00000000
UART0.UART_MDR1: 0x00000000
UART0.UART_MDR2: 0x00000000
UART0.UART_SFLSR: 0x00000000
UART0.UART_TXFLL: 0x00000000
UART0.UART_RESUME: 0x00000000
UART0.UART_TXFLH: 0x00000000
UART0.UART_RXFLL: 0x00000000
UART0.UART_SFREGL: 0x00000000
UART0.UART_RXFLH: 0x00000000
UART0.UART_SFREGH: 0x00000000
UART0.UART_BLR: 0x00000040
UART0.UART_UASR: 0x00000040
UART0.UART_ACREG: 0x00000000
UART0.UART_SCR: 0x000000C0
UART0.UART_SSR: 0x00000004
UART0.UART_EBLR: 0x00000000
UART0.UART_MVR: 0x47424603
UART0.UART_SYSC: 0x00000000
UART0.UART_SYSS: 0x00000001
UART0.UART_WER: 0x000000FF
UART0.UART_CFPS: 0x00000069
UART0.UART_RXFIFO_LVL: 0x00000000
UART0.UART_TXFIFO_LVL: 0x00000000
UART0.UART_IER2: 0x00000000
UART0.UART_ISR2: 0x00000003
UART0.UART_FREQ_SEL: 0x0000001A
UART0.UART_ABAUD_1ST_CHAR: 0x00000000
UART0.UART_BAUD_2ND_CHAR: 0x00000000
UART0.UART_MDR3: 0x00000000
UART0.UART_TX_DMA_THRESHOLD: 0x00000000
UART0.UART_MDR4: 0x00000000
UART0.UART_EFR2: 0x00000000
UART0.UART_ECR: 0x00000018
UART0.UART_TIMEGUARD: 0x00000000
UART0.UART_TIMEOUTL: 0x00000000
UART0.UART_TIMEOUTH: 0x00000000
UART0.UART_SCCR: 0x00000007
UART0.UART_ERHR: 0x00000000
UART0.UART_ETHR: 0x00000000
UART0.UART_MAR: 0x00000000
UART0.UART_MMR: 0x00000000
UART0.UART_MBR: 0x00000000
    Fullscreen UART0_first_read.txt Download 
    UART0.UART_DLL: 0x00000000
UART0.UART_RHR: 0x00000000
UART0.UART_THR: 0x00000000
UART0.UART_DLH: 0x00000000
UART0.UART_IER_CIR: 0x00000000
UART0.UART_IER_IRDA: 0x00000000
UART0.UART_IER_UART: 0x00000000
UART0.UART_EFR: 0x000000C1
UART0.UART_FCR: 0x000000C1
UART0.UART_IIR_CIR: 0x000000C1
UART0.UART_IIR_IRDA: 0x000000C1
UART0.UART_IIR_UART: 0x000000C1
UART0.UART_LCR: 0x00000003
UART0.UART_MCR: 0x00000000
UART0.UART_XON1_ADDR1: 0x00000000
UART0.UART_LSR_CIR: 0x00000060
UART0.UART_LSR_IRDA: 0x00000060
UART0.UART_LSR_UART: 0x00000060
UART0.UART_XON2_ADDR2: 0x00000060
UART0.UART_MSR: 0x00000010
UART0.UART_TCR: 0x00000010
UART0.UART_XOFF1: 0x00000010
UART0.UART_SPR: 0x00000000
UART0.UART_TLR: 0x00000000
UART0.UART_XOFF2: 0x00000000
UART0.UART_MDR1: 0x00000000
UART0.UART_MDR2: 0x00000000
UART0.UART_SFLSR: 0x00000000
UART0.UART_TXFLL: 0x00000000
UART0.UART_RESUME: 0x00000000
UART0.UART_TXFLH: 0x00000000
UART0.UART_RXFLL: 0x00000000
UART0.UART_SFREGL: 0x00000000
UART0.UART_RXFLH: 0x00000000
UART0.UART_SFREGH: 0x00000000
UART0.UART_BLR: 0x00000040
UART0.UART_UASR: 0x00000040
UART0.UART_ACREG: 0x00000000
UART0.UART_SCR: 0x000000C0
UART0.UART_SSR: 0x00000004
UART0.UART_EBLR: 0x00000000
UART0.UART_MVR: 0x47424603
UART0.UART_SYSC: 0x00000000
UART0.UART_SYSS: 0x00000001
UART0.UART_WER: 0x000000FF
UART0.UART_CFPS: 0x00000069
UART0.UART_RXFIFO_LVL: 0x00000000
UART0.UART_TXFIFO_LVL: 0x00000000
UART0.UART_IER2: 0x00000000
UART0.UART_ISR2: 0x00000003
UART0.UART_FREQ_SEL: 0x0000001A
UART0.UART_ABAUD_1ST_CHAR: 0x00000000
UART0.UART_BAUD_2ND_CHAR: 0x00000000
UART0.UART_MDR3: 0x00000000
UART0.UART_TX_DMA_THRESHOLD: 0x00000000
UART0.UART_MDR4: 0x00000000
UART0.UART_EFR2: 0x00000000
UART0.UART_ECR: 0x00000018
UART0.UART_TIMEGUARD: 0x00000000
UART0.UART_TIMEOUTL: 0x00000000
UART0.UART_TIMEOUTH: 0x00000000
UART0.UART_SCCR: 0x00000007
UART0.UART_ERHR: 0x00000000
UART0.UART_ETHR: 0x00000000
UART0.UART_MAR: 0x00000000
UART0.UART_MMR: 0x00000000
UART0.UART_MBR: 0x00000000

  • 0 in reply to Zhang Xun
    TI__Expert 7336 points

    Hello,

    I see GPMC memory address in the 2nd read, looks like there is still some interference with GPMC and UART DMA configurations. Could you please check?

  • 0 in reply to Sahana H G
    Prodigy 40 points

    Hello Sahana,

    I have tried to modify the setting of my  ECU, and the NAND flash read was successful in my project. But this issue still persists. In this case, the DMA channel of GMPC is always 2 which is same with the NAND flash read failed case.

  • 0 in reply to Zhang Xun
    TI__Expert 7336 points

    Hi Xun Zhang,

    Could you please try this alternate way of reading (RETURN PARTIAL mode) when the total transfer size is unknown. You can then extract the required data depending on the size.

    // Define your maximum packet size (adjust based on your protocol)
#define MAX_PACKET_SIZE 256  // Or whatever your max is

// Single read for the entire packet
gUartReadTrans.count = MAX_PACKET_SIZE;  // Read up to max size
gUartReadTrans.buf = recvBufferPtr;
CacheP_wbInv((void *)gUartReadTrans.buf, gUartReadTrans.count, CacheP_TYPE_ALL);

// Configure UART to return when data is available (not wait for all bytes)
// This should be set in your UART initialization:
// uartParams.readReturnMode = UART_RETURN_PARTIAL;

    Thanks,
    Sahana

  • 0 in reply to Sahana H G
    Prodigy 40 points

    Hello Sahana,

    I have tried this way. I can get the complete response of the external device. But the return value of the API "UART_read" is always -1. And the timeout parameter is 1500 millisecond in this case.

    Furthermore, I try to assign the timeout parameter to "SystemP_WAIT_FOREVER", the API "UART_read" will not return.So I suppose that the response of the external device is got due to the timeout setting， rather than the reading partial mode in this case.

  • 0 in reply to Zhang Xun
    TI__Expert 7336 points
    Zhang Xun said:
    But the return value of the API "UART_read" is always -1.

    You shouldn't see -1 if using "UART_READ_RETURN_MODE_PARTIAL". Could you confirm if this is getting set?

    Zhang Xun said:
    I try to assign the timeout parameter to "SystemP_WAIT_FOREVER", the API "UART_read" will not return.So I suppose that the response of the external device is got due to the timeout setting， rather than the reading partial mode in this case.

    If UART_READ_RETURN_MODE_PARTIAL was working, it would return immediately when the 20 bytes arrive (within microseconds), regardless of timeout.

    Please check if the correct return mode is set properly.

    Thanks,

    Sahana

  • 0 in reply to Sahana H G
    Prodigy 40 points

    Hello Sahana,

    I'm sure about that the read return mode is UART_READ_RETURN_MODE_PARTIAL. The screenshot below is the value of gUartParams in CCS watch window.

    I 'm confused with this read return mode. In the SDK I  found that this parameter is used in UART ISR, so is this read return mode only useful in UART interrupt mode rather than UART DMA mode. Besides the UART transfer mode is configured as DMA mode in our project.

  • 0 in reply to Zhang Xun
    TI__Expert 7336 points

    Hello,

    As discussed in the call, the partial return mode is only useful in case of interrupt mode, and not DMA mode.

    In case of DMA mode, it is usually expected to read fixed data length. But since you require read of varied lengths, you would need to ignore the return value of the API and instead rely on the data read, in order to determine the read status.

    Regards,

    Sahana