Part Number: AM64X-ADVANCE-SW
Other Parts Discussed in Thread: SYSCONFIG
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There is an issue in AM64x MCU+ SDK 09.01.00 |
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There is an existing FAQ chain about this issue, however, the solution does not work for me.
When Interrupt routing MCU Domain MCU_GPIO0_x ISR to R5MAIN Domain core 1_0, only ROUTE 12 and ROUTE13 show up in the SYSCONFIG of my CCS project.
This first FAQ describes how to add routes to other cores manually in the SDK, but the solution is not for my scenario. But it still shows where to modify what.
Configuring GPIO Interrupt for GPIO0_63 on R5FSS_0 core.- [FAQ] AM6442: How to configure the GPIO interrupt - Processors forum - Processors - TI E2E support forums
This FAQ is what Ineed, but it references the previous FAQ, with additional steps. It is also what I want to do, MCU GPIO routed to Main domain CORE. - AM6442: Interrupt routing MCU_GPIO0 to R5 core - Processors forum - Processors - TI E2E support forums
However, in this FAQ, the solution mentions in step 6:
Step 6: System configuration is generating the wrong code while selecting the MCU GPIO pin. So, please disable interrupts from the system configuration as per the below image.
But if you disable the interrupt in Sysconfig, and manually add it in code, the code solution line 98 where you call Board_getGpioButtonIntrNum(), there will be not function to call similar to this this for my specific GPIO IntrNum, or no define for the Intr, because disabling interrupt mode in sysconfig for that GPIO pin will remove the auto-generated definitions or functions.
