TMS570LS0432: TMS570LS0432-- SCI Tx ISR Configuration and Usage support required

Hi Aravind,

Could you please refer below attached project?

SCI_Interrupt_Mode_Testing_LS3137.zip

In this project i am receiving one byte in receive interrupt mode and echo back the same byte in transmission interrupt mode.

Make sure to follow same configurations to resolve your issue. If you need any further help, then i will again look into your issue.

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Thanks & regards,
Jagadish.

Hi Jagadish,

Thank you so much for your reply

I have doubt on the CCS  & Halcogen version using at your end??

The given ZIP is having halcogen settings as well??, This is because, we have tried on various halcogen check box mapping for Tx ISR enable.\

But could not generate the code against that in SCI init()??

Meanwhile we will work on the given package, kindly look on the queries listed above..

Thank you so much.

Aravind Adepu

Aravind Adepu said:

I have doubt on the CCS  & Halcogen version using at your end??

CCS version is 12.8.1.

HALCoGen version is 4.07.01

Aravind Adepu said:

The given ZIP is having halcogen settings as well??,

Yes, it has.

Aravind Adepu said:

This is because, we have tried on various halcogen check box mapping for Tx ISR enable.\

But could not generate the code against that in SCI init()??

If you enable SCI check box that i highlighted above, then that will generate sci.c in your source folder.

And this sci.c file consists of SCI init API, just like as shown below.

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Thanks & Regards,
Jagadish.

Hi Jagdish,

This is regarding Tx ISR configuration and usage.

------>Given examples and Halcogen is useful to some extent but we need Tx-ISR function in code but this is not visible anywhere.

We are testing our application with polling mode for transmitting data through modem in SCI module.

Data sending in polling mode will slow the transfer and effect throughput of the overall application.

So kindly help us Tx-ISR functions in code,

----->Also help us any means of upgrading this IC to have second SCI module, this second sci we will use for additional debug support for sending test strings in application flow.

If we can arrange online meeting kind, it will be more useful.

Please reply or call for a meeting if possible

Hi Aravind,

You no need to handle Tx-ISR manually, 

In above API, instead of 1 byte give number of bytes you want to send and input buffer address, then this will happen:

After sending each byte from Tx buffer a Tx-interrupt will get generate and this will call the below linHighLevelInterrupt interrupt API:

In this API the code will go to the case-12 for Tx related interrupt, there a new data will be pushed to the TD register based on the number of bytes required to transmit. And then it will exit from this interrupt API and process will repeat again (Again Tx interrupt will come and copy new data to the TD register), this process will continue until all the data gets shift out. Once all the data transmitted then a callback function will get called.

So basically, this simplifies the process of interrupt handling.

--
Thanks & Regards,
Jagadish.

Thank you so much for your immediate reply, We will check and let you know

HI Jagdish,

If you can guide us on second SCI available controller in this family, we will check and update the same.

linHighLevelInterrupt is common for both TX and RX Interrupts or

we need to configure it separately ie Low level for Rx and high level for Tx or vice-versa.

Kindly reply on this point

Hi Aravind,

The above setting in HALCoGen will decide whether corresponding interrupt is in High level or Low level. In our example we configured both as High level that is why for both Rx and Tx we got High level interrupts only.

If you want, you can configure one in high level and other is in low level. They are just priority levels, If two interrupts are pending at same time this will decide which one to be process first.

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Thanks & regards,
Jagadish.