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AM2434: Firewall Regions for DMSC

Part Number: AM2434

Hello,

I'm currently running into weird problems while accessing the DMSC via the SCI client. My current guess for the root cause is that I'm overriding the already existing firewall configuration for MSRAMK7. While debugging I have realized that there are already a bunch of configurations set, right after the null bootloader. I assume they are required for the DMSC, as the DMSC uses a part of MSRAMK7? Which of those region configurations are necessary, because almost all of the 8 regions are already preconfigured? I'm asking because there would be space in MSRAMK7 left, which is unused by DMSC. But without available firewall regions unfortunately I won't be able to utilize this memory range.

Kind regards,
Benedikt Schmidt

  • These are by the way the dumped firewall registers for MSRAMK7:

    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_0_control;0x0000000A
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_0_permission_0;0x00C3FFFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_0_permission_1;0x00C3FFFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_0_permission_2;0x00C3FFFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_0_start_address_l;0x701E0000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_0_start_address_h;0x00000000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_0_end_address_l;0x701FCFFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_0_end_address_h;0x00000000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_1_control;0x0000021A
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_1_permission_0;0x00CA8F8F
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_1_permission_1;0x00008888
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_1_permission_2;0x00008888
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_1_start_address_l;0x44078000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_1_start_address_h;0x00000000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_1_end_address_l;0x4407AFFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_1_end_address_h;0x00000000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_2_control;0x0000021A
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_2_permission_0;0x00CAFFFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_2_permission_1;0x00008888
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_2_permission_2;0x00008888
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_2_start_address_l;0x44074000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_2_start_address_h;0x00000000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_2_end_address_l;0x44077FFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_2_end_address_h;0x00000000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_3_control;0x0000000A
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_3_permission_0;0x00C3FFFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_3_permission_1;0x00C3FFFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_3_permission_2;0x00C3FFFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_3_start_address_l;0x44060000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_3_start_address_h;0x00000000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_3_end_address_l;0x44073FFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_3_end_address_h;0x00000000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_4_control;0x00000200
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_4_permission_0;0x00CA9F9F
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_4_permission_1;0x00008888
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_4_permission_2;0x00008888
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_4_start_address_l;0x44060000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_4_start_address_h;0x00000000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_4_end_address_l;0x44062FFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_4_end_address_h;0x00000000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_5_control;0x0000010A
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_5_permission_0;0x00C3FFFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_5_permission_1;0x00C3FFFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_5_permission_2;0x00C3FFFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_5_start_address_l;0x701C0000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_5_start_address_h;0x00000000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_5_end_address_l;0x701DFFFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_5_end_address_h;0x00000000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_6_control;0x0000001A
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_6_permission_0;0x000BFFFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_6_permission_1;0x00008888
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_6_permission_2;0x00008888
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_6_start_address_l;0x4407C000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_6_start_address_h;0x00000000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_6_end_address_l;0x4407FFFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_6_end_address_h;0x00000000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_7_control;0x0000001A
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_7_permission_0;0x000BFFFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_7_permission_1;0x00008888
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_7_permission_2;0x00008888
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_7_start_address_l;0x701FC000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_7_start_address_h;0x00000000
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_7_end_address_l;0x701FFFFF
    FW_REGS_Imsram32kx64e_main_7_slv_fw_region_7_end_address_h;0x00000000

    As you can see, only region 4 is not enabled at this point. Which gives me only very little design freedom.

  • Hello,

    The firewalls set by DMSC are available here

    https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/am64x/firewalls.html

    The bootloader also configures the MSRAM firewalls to allow access to everyone for all banks except BANK7

    https://github.com/TexasInstruments/mcupsdk-core/blob/6a622a5c2729c5ad10ba066646944609dc0c64bb/source/drivers/bootloader/soc/am64x_am243x/bootloader_soc.c#L1168

    You should be able to use all the MSRAM except the last portion of the BANK7 as described in the following memory layout

    https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/11_02_00_24/exports/docs/api_guide_am64x/MEMORY_MAP.html

    If you think the issue you are observing is caused by the firewalls, you should enable the SYSFW logs and see if there are any firewall exceptions. Otherwise, please describe the issue a bit more for me to provide any suggestions.

  • Thank you, this information was very helpful. Based on this I was able to keep the firewall regions configured by DMSC as they are, which resolved my problem.