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SYSCONFIG: DCC generates code with wrong clock source 0

Part Number: SYSCONFIG
Other Parts Discussed in Thread: AM263P4

Hi team,

When I try to configure DCC for AM263P4 with SysConfig version 1.26.2+4477, it generates code that uses a different clock source for clock source 0 (zero) than what I selected.

Steps to reproduce

Create a AM263P4 project and add DCC and ESM configuration as shown below.

image.png

Expected result

configParams.mode = SDL_DCC_MODE_CONTINUOUS;
configParams.clk0Seed = 100;
configParams.clk1Seed = 4000;
configParams.clk0ValidSeed = 200;
configParams.clk0Src = SDL_DCC_CLK0_SRC_CLOCK0_2;
configParams.clk1Src = SDL_DCC_CLK1_SRC_CLOCKSRC0;

Where SDL_DCC_CLK0_SRC_CLOCK0_2 = 2

Actual result

configParams.mode = SDL_DCC_MODE_CONTINUOUS;
configParams.clk0Seed = 100;
configParams.clk1Seed = 4000;
configParams.clk0ValidSeed = 200;
configParams.clk0Src = SDL_DCC_CLK1_SRC_CLOCKSRC1;
configParams.clk1Src = SDL_DCC_CLK1_SRC_CLOCKSRC0;

Where SDL_DCC_CLK1_SRC_CLOCKSRC1 = 1

Note that clk0Src uses a constant meant for clock source 1 which doesn't match the expected configuration even by value.

This mismatch can be observed when selecting other values (maybe even all) of clock source 0 as well.