Part Number: TMS570LS1224
a) Flash Pump Access Control Register 1 (FPAC1)
The register description states the value after reset for the PSLEEP field bits 26-16 is 64h, however during development I am seeing C8h
b) EEPROM Emulation ECC Register (FEMU_ECC)
The register description states the value after reset for the EMU_ECC[7:0] field bits 7-0 is 3h, however during development I am seeing 0h
c) Flash Bank Fallback Power Register (FBFALLBACK)
The register description states the value after reset for reserved bits 31-16 is 0505h, however during development I am seeing 0000h
d) Flash Bank Configuration Register (FCFG_BANK)
The register description states the value after reset for reserved bits 3-0 is 2h, however during development I am seeing 1h