Part Number: TMS570LC4357-EP
Team,
TMS570LC43x TRM SPNU563 defines 8 MPU regions (see 11-12 page 478).
What happens if the SW configure CPU CP15 for a region that does not exist like 9, 10, 13 ..etc?
Here is an associated ASM code example that does the complete CP15 init (base address, size, and access permissions for specific memory regions):
1.Select MPU Region 13
mov r0, #13
mcr p15, #0, r0, c6, c2, #0
Selects MPU region number 13 using a coprocessor register write to the system control coprocessor (p15).
2. Set Region Base Address
ldr r0, BASEADDRESS
mcr p15, #0, r0, c6, c1, #0
Loads the base address from the label BASEADDRESS and writes it to the MPU region base address register.
3. Configure Memory Attributes
MOV r0, #0x0004
ORR r0, r0, #0x1300
mcr p15, #0, r0, c6, c1, #4
Sets memory attributes (resulting in value 0x1304):
- Strongly-ordered memory (no reordering of transactions)
- Shared (accessible from multiple processors/masters)
- Read/Write permissions in all privilege modes
- No execute permission
4. Set Region Size
movw r0, #0x2F
mcr p15, #0, r0, c6, c1, #2
enables the region a 16MB region
-How will CPU CP15 behave in the context of the TMS570?
An external HW is connected on EMIF 4 (with CE4CFG programmed to 0xC4600301).
-What does happen at the EMIF level?
Thanks in advance!
Anthony
