MSPM0G3507: DMA mode example of using ADC

Thank you for your reply.

This is for I2C. Do you have the example for ADC module?

By the way, this example for I2C is for the case when the I2C frame size is fixed at 16 bytes, right? It means for the I2C communication with varying frame size, it won't work and the logic of handling variable gTxLen needs to be added, right?

Thanks!

Crane

Hi Crane,

Sorry for misunderstanding the request. For ADC example with DMA, I think we have example in our SDK:adc12_max_freq_dma

Crane Shao said:

By the way, this example for I2C is for the case when the I2C frame size is fixed at 16 bytes, right? It means for the I2C communication with varying frame size, it won't work and the logic of handling variable gTxLen needs to be added, right?

Yes, because the DMA size is fixed, so it could only receive fix frame size by default. If you want to receive varying frame size by DMA, I think a timeout mechanism should be implement in this case.

Ok got it. Thanks!

One more question about ADC trigger.

From the example of adc12_triggered_by_timer_event.c, when the repeating mode is disabled, the ADC conversion should be triggered by Timer0 continuously, right? The Timer0 is modified to Periodic Down Counting and I can see the Timer0 interrupt firing continuously, but the ADC conversion is only triggered once. Any idea what might be missed?

Thanks!

Crane

Hi Crane,

To trigger ADC sampling by timer in a repeat way, you need to keep ADC repeat mode enabled. And configure the first ADC memory (ADC Conversion Memory 0) trigger mode as "Valid trigger will step to next memory conversion register" as below.

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Ok I see it. Thanks!

I seems when enabling FIFO mode for DMA, it affects the conversion interrupt interval about 15 times. Would this just affect the intervals of interrupt or the conversion as well? And the reason it is about 15 times because the FIFO size is 16? 

Thanks!

Crane

Hi Crane,

In ADC FIFO mode, all the ADC memory is combined as a "FIFO" and the ADC could only sample for one channel, and the sampling result of this channel will be stored in ADC result memories in a similar way with "FIFO". So if only one ADC result loaded interrupt is enabled, the interrupt interval will be FIFO size times of previous time with single sampling mode.