Part Number: AM6442
I am currently running 4 R5 cores in bare-metal mode and 2 A53 cores with Linux on the AM6442.
GPIO allocation is as follows:
- A cores (Linux):
- GPIO0_42 (Bank 2, interrupt router outputs 0–11)
- R cores (bare-metal):
- GPIO0_7 (Bank 0, interrupt router output 12)
- GPIO0_8 (Bank 0, interrupt router output 13)
- GPIO0_9 (Bank 0, interrupt router output 14)
- GPIO0_10 (Bank 0, interrupt router output 15)
All GPIOs are configured as input with rising-edge interrupt trigger.
Issue Description
When the A cores (Linux) are running:
- GPIO interrupts on the R cores are lost intermittently
When I pause the A cores in debug mode:
- GPIO interrupts on all 4 R cores become stable (no loss)
Additional Information
- The GPIO banks used by A cores and R cores are separated:
- A cores → Bank 2
- R cores → Bank 0
- The R cores are using per-pin GPIO interrupts (not just bank-level polling)
- Below is the GPIO ISR implementation on the R cores (attached)
Question
Is there any issue with this configuration?
Even though the GPIO banks are separated, it appears that the A cores (Linux) are still affecting GPIO interrupt behavior on the R cores. I would like to understand:
- Whether there are shared resources (e.g., interrupt router, GPIO module, or interrupt status registers) that could cause this interference
- Or if Linux might be reconfiguring or clearing GPIO-related registers that impact R core interrupts
