AM625: Custom Board Based on AM625X CPU does not working

Hello Jeong-Seon Lee

Thank you for the query.

Let me review and comeback.

Is the SOM board connected to a carrier board and powered-up or is the SOM powered as a stand-alone module.

Jeong-Seon Lee said:

The main board that can be connected to this board for testing, and the MCU_RESETZ pin can be controlled via a push button on this board.

Please share the main board implementation. .Can you measure the VDD_core voltae, MCU_PORz and MCU_RESETz signals.

Regards,

Sreenivasa

VDD_CORE 852~864mV, MCU_PORz staying 1.80V, MCU_RESETz measured 3.3V. I Shared the Image MB MCU reset part.MB_AM62X-REV1_0-20230531-1.pdf

When I press SW3, I can see it moving from High to Low and then coming back up, but RESETSTATz remains in a low state regardless of this.

Kallikuppa Sreenivasa said:

VDD_core

Hello Jeong-Seon Lee

Thank you

I suspect this is an issue related to the oscillator.

In case you are using a crystal with 18pF load, try changing to 6..12pF 

As a quick check, can you increase the load cap a little higher and check.

Is there a way you can apply a 25M clock.

Regards,

Sreenivasa

Hello Jeong-Seon Lee

Could you capture the core supply, MCU_PORz and MCU_RESEtz waveform.

Regards,

Sreenivasa

Hello. I conducted the test as you suggested, but it still does not work.
Same result whether I increase or decrease the capacitor capacity.

8080.Image.zip

I have compressed and attached four images. Please refer to the filenames.

Hello Jeong-Seon Lee

Thank you.

I need the waveform slew for the reset signals.

Do you have provision to connect external clock.

Please note you need to ground X0.

Refer SOC data sheet.

Regards,

Sreenivasa

RESETSTATZ remains completely LOW, and the slew waveform can only be observed with MCU_RESETZ, which is generated by pressing SW3. 
Since MCU_PORZ stays HIGH from the moment power is applied, the slew waveform cannot be seen.

Which part should I capture to show you?

Hello Jeong-Seon Lee

There should be a 10mS delay for MCU_PORz to go high after the supplies ramp.

Please capture VDD_CORE and MCU_PORz signals to measure the delay.

The slew i requested was for RESETz when you press the button.

Regards,

Sreenivasa

7674.Images.zip

I uploaded two images. One measured the rising time of MCU_RESETz, and the other measured the delay between MCU_PORz and VDD_CORE.
I ask for your understanding that I am sending it as a zip file because errors keep occurring when I upload it as an image file.

Hello Jeong-Seon Lee

Can you please confirm if the MCU_PORz signal is coming before the core supply.

This is not allowed.

Please refer to the SOC data sheet for the voltage sequencing and MCU_PORz sequencing during power-up.

Regards,

Sreenivasa

Hello Jeong-Seon Lee

The RESETz signal slew is in ms.

Can you apply an external reset input that has a slew of <100ns

Regards,

Sreenivasa

Hello Jeong-Seon Lee

Do you have a 25M oscillator that you can connect and test.

When using external oscillator, X0 needs to be connected to ground.

Follow SOC data sheet.

Regards,

Sreenivasa

Even after modifying the TADJ on the LM3881MM side, MCU_PORz appears before VDD_CORE. Is there a way to delay PORz compared to VDD_CORE in the current schematic?

Hello Jeong-Seon Lee

The MCU_PORz seems to be generate by the AND gate and capacitors. Please try adjusting.

In the next revision consider using a reset circuit that can accurately time the MCU_PORz after the supplies ramp

Regards,

Sreenivasa

Hello Jeong-Seon Lee

The PORz_OUT and WKPU_CLKOUT0 could have been a good indicator.

Is there a way you could access these 2 pin and probe them.

WKUP_CLKOU0 is the buffered output of MCU_OSC0_XO and PORz_OUT is the buffered output of MCU_PORz

Regards,

Sreenivasa

Hello Jeong-Seon Lee

Checking if you were able to make some progress?

Regards,

Sreenivasa

These two pins are not connected. 
Is there another pin that can serve as an indicator for these two pins?

Hello Jeong-Seon Lee

Thank you.

Can you please use a passive X10 probe and measure the 25M clock waveform and share.

Regards,

Sreenivasa

This is the 25M Clock measured with an X10 probe.
Is there anything in particular that needs to be observed?

Hello Jeong-Seon Lee

Thank you.

The issue being observed is the MCU_PORz  input goes high much before the supplies ramp.

This may likely not initialize the internal circuits as expected.

The MCU_PORz is generated from and external logic.

After all the supplies ramp, can you force the MCU_PORz low and release.

This is not a recommended practice since the output shorts to ground. This is recommended as a quick check. Can you please give a try.

Regards,

Sreenivasa

I intentionally delayed the rise of MCU_PORz. 
This is the waveform obtained by cutting a jumper on the PG pin of the AP61402 (a regulator that outputs VDD_CORE voltage). 
I removed both existing AND gates and configured the circuit solely with RC, using R = 10kOhm and C = 4.7uF. 
Should there be no issues with this waveform? In this state, even if I temporarily short-circuit C and then unshort it after booting, the system does not boot.

Hello Jeong-Seon Lee

The slew is too slow.

Is should be <100ns

Can you add a pulldown to MCU_PORz.

Power-up the board and connect an external 1.8V pulse from a function generator. The function generator is expected to go high after all the supplies ramp and a delay of > 10mS

Regards,

Sreenivasa

Hello Jeong-Seon Lee

In the above scope capture, please help me understand what the yellow line indicates.

Regards,

Sreenivasa

The yellow line is the Core Voltage. (0.85V)

I will proceed with the test as you instructed.

Hello Jeong-Seon Lee

Thank you.

Regards,

Sreenivasa

Hello Jeong-Seon Lee

FYI, we have an FAQ for board bring-up in case you have not had a chance to review 

 [FAQ] Board bring up tips for Sitara devices (AM64x, AM243x, AM62x, AM62L, AM62Ax, AM62D-Q1, AM62Px) 

Regards,

Sreenivasa

Hello.

Thanks to the document you uploaded, I think I have found a problem.

Looking at the MCU_PORz sequence, I confirmed that it turns on later than the other powers, but I also noticed that the Main Clock starts earlier than MCU_PORz. 
Is there a way to delay this?

Hello Jeong-Seon Lee

Thank you.

This is expected.

The MCU_OSC0 clock is expected to be stable before MCU_PORz is released. 

Can you please check if the clock starts after VDDS_OSC0 PWR MCU_OSC0 supply ramps?

Regards,

Sreenivasa

Hello Jeong-Seon Lee

Please try toggling the MCU_PORz H-L, delay > 1200ns  and L-H after all the supplies ramp.

refer data dheet

Regards,

Sreenivasa