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AM2612: SDFM Pinmux For AM261

Alex Paul
Expert 6086 points

Part Number: AM2612

Hi Experts,

I am planning to use the LP-AM261x to evaluate SDFM current measurements using PRU and HW IP together with AMC3306. 
Can I use any PRU pin to generate the CLK and Datastream input pin ? 

Currently I am planning to use (PR1_PRU1_GPIO11 & PR1_PRU0_GPIO_1) which are pinned out at the Launchpad. 
Is that possible ? Or is there any limitation (like Pins need to come from the same PRU slice) ? 

Regards,
Alex

  • 0
    TI__Expert 4400 points
    Alex Paul said:
    I am planning to use the LP-AM261x to evaluate SDFM current measurements using PRU and HW IP together with AMC3306. 
    Can I use any PRU pin to generate the CLK and Datastream input pin ? 

    How do you plan to generate the clock, and which source will you use? You cannot select any pins, it depends on the clock source you choose

  • 0 in reply to Achala Ram
    TI__Expert 6086 points

    Hi Achala,
    CLK signal is supposed to come from AM261x to provide to AMC3306.

  • +1 in reply to Alex Paul
    TI__Expert 4400 points

    There are multiple options. We have on AM243x, the same configuration and corresponding pins can be used on AM261x also, but there are overlaps with SDFM pins.

    1. GPIO: PRG_PRU1/0_GPI1. Trade-off: Overlaps with SD0 channel so you will lose one SD channel.

    2. IEP SYNC out: SYNC0 and SYNC1 out pins: IEP0 SYNC_OUT0 or IEP0 SYNC_OUT1. Both can be used in the case of phase compensation. There is a conflict between SDFM channel 8 data PIN and IEP0 SYNC_OUT1.

    3. ECAP: PRGx_ECAP0_IN_APWM_OUT signal, no overlap with SD pins.

    Also at SOC level, EPWM can be used to generate clock, Pins selection will depend on which EPWM instance you select

    Details: software-dl.ti.com/.../EXAMPLES_CURRENT_SENSE.html

    BR,

    Achala Ram