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RM48L952: ADC Self-Test External Capacitor Discharging

Part Number: RM48L952

Hello,

I am using the RM48's ADC self-test mode to determine ADC channel conditions such as open circuit, and short to adRefHi / adRefLo. We are using RC filters at the ADC inputs for filtering after having observed substantial amounts of noise present in the sensor's readings. The filter includes ~6uF of capacitance at the input, which seems to be causing issues with the self test as the external capacitor isn't discharging fast enough. This leads to reads of Vd and Vu which closely resemble the Vn value during the open circuit case.

We are using the external capacitor discharge setting with a large sample time. We have also experimented with adjusting the ADCLK such that we can support a longer sample time / external capacitor discharging period. It seems that we are unable to tune the settings appropriately within the limits (slowest ADCLK period with maxumim sample time prescaler and external discharge prescaler) and would prefer not to change the filter if possible.

Is it possible to switch in the internal 5k / 7k resistors used by the ADC self-test mode prior to the self-test measurement for a user-defined period of time? For example, is it possible to write "ADC_CALCR_SELF_TEST_VAL | ADC_CALCR_HILO_VAL" to the CALCR register and then wait 20ms prior to starting the self-test measurement via an application-induced delay? Or is the only mechanism to achieve this through use of the Discharge External Capacitance setting? Is there another method to induce a substantial external capacitance discharge time (~20ms)?

Thanks for your help,
Tyler

  • Hi Tyler,

    The RM48L952's Technical Reference Manual does not explicitly document whether the internal self-test resistors (R1/R2) can be manually engaged via CALCR register writes independently of the automated self-test conversion sequence. The exact maximum discharge time achievable with the slowest ADCLK prescaler and maximum discharge prescaler is also not fully specified in the available material. The details below are based on the best available information from TI documentation and a closely related E2E thread on this exact device.


    Direct Answer

    The ADC self-test architecture on the RM48L952 does not provide a documented mechanism to pre-engage the internal 5kΩ/7kΩ resistors for a user-defined period before the self-test measurement. The self-test internally connects these resistors to the ADC pin during the test's charge/discharge cycles, but this switching is tied to the self-test conversion sequence itself — not independently controllable [1].

    Your proposed approach of writing ADC_CALCR_SELF_TEST_VAL | ADC_CALCR_HILO_VAL to CALCR and then waiting 20ms before initiating the measurement is creative, but there is no documentation confirming this will keep the internal switches (S1/S2 in the TRM's self-test schematic) closed during that delay. The self-test mode described in TRM Section 19.8.2 treats the resistor connection and the ADC sampling as part of a single coordinated sequence [2][3].

    Why This Happens

    The self-test works by connecting VREFHI or VREFLO through internal resistors (R1 ≈ 5kΩ, R2 ≈ 7kΩ) to the ADC pin, forming a voltage divider with your external circuit. With ~6µF of external capacitance, the RC time constant through these internal resistors is on the order of 30–42ms (5kΩ × 6µF = 30ms). The self-test's timing — even at the slowest ADCLK with maximum prescalers — cannot accommodate this. The result is that Vu and Vn converge, producing ADC_PIN_UNDETERMINED [1].

    Your Options

    1. Reduce external capacitance — This is the most reliable path. The self-test was not designed for capacitance this large. Even the E2E thread discussing 200nF capacitors showed marginal behavior; 6µF is roughly 30× larger [1].

    2. External discharge path — Consider adding an analog switch (controlled via GPIO) in parallel with the capacitor that you activate before running the self-test. This would allow you to discharge the capacitor to a known state on your own timing, then run the self-test immediately after.

    3. Custom diagnostic routine — Instead of relying on the built-in self-test, you could implement your own open/short detection by:

      • Reading the ADC channel at a known operating point
      • Comparing against expected voltage ranges for open-circuit, short-to-high, and short-to-low conditions
      • This bypasses the self-test timing constraints entirely, though it requires you to define and validate your own diagnostic thresholds
    4. Split the filter — Use a smaller capacitor at the ADC pin (e.g., 100nF) for self-test compatibility, and place the bulk of your filtering capacitance behind a series resistor further upstream. This preserves noise filtering while reducing the effective capacitance seen during self-test.

    What Won't Work

    The Discharge External Capacitance mode (TRM Section 19.8.4) is a separate feature from the self-test — it discharges the internal sample capacitor (Csamp) between conversions to reduce crosstalk, not the external capacitor on the pin [2]. It will not help with your 6µF discharge problem.


    Recommendation

    If you cannot modify the filter, option 2 (GPIO-controlled analog switch) or option 3 (custom diagnostic) are your most viable firmware-side paths. If hardware changes are on the table, option 4 (split filter topology) gives you the best of both worlds.

    I'd recommend confirming with TI directly whether the CALCR register write approach you proposed has any effect on the internal switch state independent of the conversion — it's a reasonable hypothesis, but undocumented behavior carries risk in a safety-critical context.


    Citations:

    1. RM48L952 SafeTI ADC Self-Test — TI E2E Forum
    2. RM48x Technical Reference Manual (SPNU503C)
    3. RM48x TRM — ADC Self-Test Mode Section 19.8.2

    Best Regards,

    Zackary Fleenor