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AM2612: AM2612 - Sampling Qualification Questions of Formula

Part Number: AM2612

Champs:

 

Inquiry regarding the calculation method for 13.1.1.4.4.3 Qualification Using a Sampling Window (as circled in red below, plz check):
How is the Sampling Period calculated when different sample settings are used? I am having trouble understanding the logic in the table below.

How is the formula?

Plz show the formula and explain in detail.

Thanks.

BR Rio

  • Here's a detailed breakdown of how the sampling period and total sampling window are calculated, based on section 13.1.1.4.4.3 of the AM261x TRM.

    Two User-Controlled Parameters

    The qualification logic requires you to configure two things [1]:

    1. Sampling Period — how often the signal is sampled (set via `QUAL_PERIOD_PER_SAMPLE` bits in `IOMUX_QUAL_GRP*_*_CFG_REG`)
    2. Number of Samples — either **3** or **6** samples (set via the `QUAL_SEL` register)

    ---

    Formula 1: Sampling Period (Table 13-9)

    The sampling period is controlled by the QUALPRD setting (an 8-bit value, `n`, ranging from 0x00 to 0xFF) [2]:

    | QUALPRD Setting (`n`) | Sampling Period Formula |
    |---|---|
    | `n = 0` | **1 × T_SYSCLK** |
    | `n ≠ 0` | **2 × n × T_SYSCLK** |

    Where T_SYSCLK is the period of your system clock (i.e., `1 / f_SYSCLK`) [2].

    > Example: If QUALPRD = 1, the sampling period = 2 × 1 × T_SYSCLK = 2 SYSCLK cycles (the GPIO pin is sampled every 2 clock cycles) [3].

    The equivalent **sampling frequency** formula (Table 13-10) is [2]:

    | QUALPRD Setting (`n`) | Sampling Frequency Formula |
    |---|---|
    | `n = 0` | **f_SYSCLK** |
    | `n ≠ 0` | **f_SYSCLK / (2 × n)** |

    > **Note:** The QUALPRD setting applies to **groups of 8 GPIO pins** (e.g., GPIO0–GPIO7 share one setting, GPIO8–GPIO15 share another) [3].

    ---

    Formula 2: Total Sampling Window Width

    The key insight: the number of sampling periods in the window is always one less than the number of samples taken[4]. This is because you're counting the *intervals between* samples, not the samples themselves.

    | Sample Mode | Number of Samples | Window Width (in sampling periods) |
    |---|---|---|
    | 3-sample (`QUAL_SEL`) | 3 | **2 × Sampling Period** |
    | 6-sample (`QUAL_SEL`) | 6 | **5 × Sampling Period** |

    Combining with the sampling period formula, the **complete sampling window formula** is [3]:

    > Sampling Window = (Number of Samples − 1) × 2 × QUALPRD × T_SYSCLK
    > *(when QUALPRD ≠ 0)*

    For 6-sample mode specifically, this simplifies to [3]:

    > t_W(IQSW) = (T_SYSCLK × 2 × QUALPRD) × 5

    Worked Example (from Figure 13-5)

    With **QUALPRD = 1** and **6-sample mode** [3]:

    1. Sampling Period = 2 × 1 × T_SYSCLK = 2 T_SYSCLK
    2. Sampling Window = 5 × 2 T_SYSCLK = 10 T_SYSCLK
    3. The input must be stable for at least 10 SYSCLK cycles for the qualifier to detect the change

    Important: Asynchronous Margin

    Since external signals are asynchronous to your system clock, the input must actually be held stable for longer than the sampling window to guarantee detection. The extra margin needed is up to one additional sampling period + T_SYSCLK[5].

    In the example above: 10 + 2 + 1 = 13 T_SYSCLK for reliable recognition [3].

    To help refine this further, it would be useful to know:
    - What SYSCLK frequency your AM261x is running at (to convert these to actual nanosecond/microsecond values)
    - Whether you're planning to use 3-sample or 6-sample mode
    - The characteristics of the input signal you're trying to qualify (expected pulse widths, noise profile)

    Citations:

    1. [AM261x TRM — Section 13.1.1.4.4.3 Qualification Using a Sampling Window](www.ti.com/.../sprujb6b.pdf
    2. [AM261x TRM — Table 13-9 (Sampling Period) & Table 13-10 (Sampling Frequency)](www.ti.com/.../sprujb6b.pdf
    3. [AM261x TRM — Figure 13-5 Input Qualifier Clock Cycles & Notes](www.ti.com/.../sprujb6b.pdf
    4. [AM261x TRM — Total Sampling-Window Width](www.ti.com/.../sprujb6b.pdf
    5. [AM261x TRM — Asynchronous Signal Stability Note](www.ti.com/.../sprujb6b.pdf

  • Hi Shaunak:

    Thanks for the fast + detail replied, appreciated, let me check with my cust.

    BR Rio

  • Hi Shaunak:

    My cust agreed This can be closed.

    BR Rio