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AM62P: Digital Windowed Watchdog (DWWD) issue

Part Number: AM62P

Hi,
I am faing issue Digital Windowed Watchdog (DWWD).I am trying to do the interrupt in the watchdog. The interrupt is hit, but not as per the expectation.

 1.When set the RTI clock as 12Mhz the interrupt timing is 2.6 seconds (No variation observed in the interrupt timing when change the preload value. But it set in the register successfully)image2.When set the RTI clock as 200Mhz the interrupt timing is 1.3 seconds.imagecould you please help me on this ?PFA for preload value set in the registerimageimage 

I am using r5 core and the MCU_RTI. and how to ensure the watchdog reset for this core. 
1.Why the timing value is not react as per the pre load value.
2.How the preload value is considered by the down counter for reset or interruppt.
3. Am I missed any one of the procedure for watchdog functionality ?
Procedure I did for the watchdog 
1. Initialize the RTI
2.Set the source clock for RTI
3.Initialize the watchdog
4.Start the wtchodg module
5.Configured the interruppt relaed elements
6.Service is not happended, expected the reset or interrupt based on the preload value.
Observations are
1.watchdog is enabled. because verified the RTI_RTIDWDCTRL Register. it's updated as 0xA98559DA.
2.preload value is updated in the register.
3.in the downcouter DWDCNTR register the value is decremented