AM3358: PTP time synchronisation and getting a PPS on the output .

Hello,

The subject matter expert is out of office this week. Please expect a delayed response. Thanks.

Hello Haseeb, 

Does the below answer help address your question about obtaining a PPS signal?

 RE: AM3359: Availability of PPS signal on AM335x devices 

Also, can you share a little more about what the purpose for PPS is in your use-case? If it's just for PTP time synchronization across devices already connected via Ethernet, then a PPS might not be necessary. However maybe there is some special use PPS has in your system.

-Daolin

Hi Daolin Qiu ,

I am using an FPGA system wherein on the hardware fabric I have this system (basically a data acquisiton )  which needds to be time synchronized. Now as its hardware it only will understand clocks . So protocol says 4000 samples per second (very less i know). 

Now in order for me to have that protocol I found the simplest one would be to get a PPS from the GPS and feed it directly to the hardware and hence writing my code based on that to fulfill the protocol criteria.

Now they want actually tto use PTP rather than GPS (even though i understand ptp will also have a gps grandmaster clock) . So For doing that what i use was an BBB board which runs a TI patched kernel on it and i was able to synchronize the clock of BBB with the PTP and then have a gpio pin output a pps pulse which then goes to this FPGA hardware. 

The problem i ran to was I am ruunning a python script  current to toggle a gpio after it has synchronized and i run the phc2sys. It aligns itself but there is a pipeline delay and the GPS derived PPS and my own PTP derived PPS are always at a constant delay of some half a second . 

Now I am trying to change the priority using RT_PREEMPT. But i saw this functionality in the AMC33x uP that we can have a hardware geenrated PRU clock which would run inddependent of OS pipeline lag. 

I wanted to know more about it . 

Thanks 

Hi Haseeb, 

Apologies for the delay in response

Haseeb Afzal Mir said:

The problem i ran to was I am ruunning a python script  current to toggle a gpio after it has synchronized and i run the phc2sys. It aligns itself but there is a pipeline delay and the GPS derived PPS and my own PTP derived PPS are always at a constant delay of some half a second

From which device is the GPS derived PPS coming from? Is your goal to replace the GPS derived PPS with the PTP derived PPS or is to have GPS derived PPS synchronized with PTP derived PPS? What device is your PTP grandmaster clock? 

Haseeb Afzal Mir said:

Now I am trying to change the priority using RT_PREEMPT. But i saw this functionality in the AMC33x uP that we can have a hardware geenrated PRU clock which would run inddependent of OS pipeline lag. 

The PRUs use a module called IEP from which sync signals such as PPS sourced from PTP are generated. Is this what you meant by hardware generated PRU clock? https://software-dl.ti.com/processor-sdk-linux/esd/docs/06_03_00_106/AM335X/linux/Industrial_Protocols_PTP.html#pru-icss-iep

-Daolin

Daolin Qiu said:

From which device is the GPS derived PPS coming from? Is your goal to replace the GPS derived PPS with the PTP derived PPS or is to have GPS derived PPS synchronized with PTP derived PPS? What device is your PTP grandmaster clock? 

Goal is to replace the GPS Derived PPS with the PTP derived PPS. But for validation of my sync actually working . I need that my PTP derived PPS and GPS derived PPS are aligned at the second boundary. 
GPS derived PPS , I am using GARMIN 18x LVC which provided a PPS pin directly out .. For a PTP server we have one in our lab SyncServer S600 Enterprise NTP/PTP Time server (It also essentially uses a GPS source internally as well).

Daolin Qiu said:

The PRUs use a module called IEP from which sync signals such as PPS sourced from PTP are generated. Is this what you meant by hardware generated PRU clock? https://software-dl.ti.com/processor-sdk-linux/esd/docs/06_03_00_106/AM335X/linux/Industrial_Protocols_PTP.html#pru-icss-iep

Yeah this is something I am looking for . So we run the ptp4l sync and do phy2sys . After that echo 1 > enable_pps will be a pulse synchronized with the GPS PPS right ? 

The device tree you mentioned is for the ICE board . I am using the BBB . uses the same TI chip . we can change the above mentioned device tree file with my own desired right ? 

until BBB provides one with the functionality . 


Currently I am using the  5.10.168-ti-r83 kernel. This one doesn't seem to have the pps_enable driver on it . 

Hi Haseeb,

Haseeb Afzal Mir said:

Goal is to replace the GPS Derived PPS with the PTP derived PPS. But for validation of my sync actually working . I need that my PTP derived PPS and GPS derived PPS are aligned at the second boundary. 

So for validation purposes you need GPS derived PPS synchronized with the PTP derived PPS but ultimate goal is to replace GPS derived PPS? If so, then how are you syncing/connecting your Garmin 18x LVC with the PTP server you have? My understanding is that in order for time synchronization to occur there must be some protocol that is running (e.g. all PTP devices use PTP for synchronization which ensures all PPS signals are synchronized).

Haseeb Afzal Mir said:

The device tree you mentioned is for the ICE board . I am using the BBB . uses the same TI chip . we can change the above mentioned device tree file with my own desired right ? 

Haseeb Afzal Mir said:

Currently I am using the  5.10.168-ti-r83 kernel. This one doesn't seem to have the pps_enable driver on it .

It sounds like the main issue is that you can't generate a PPS signal from PTP right now on your BBB. First, you need to check if the BBB has a physical header/pin that the PPS signal can be routed to. Second, it looks like from the SDK documentation I shared on IEP, SDK 06_03_00_106 is used which uses kernel version 4.19.94. However I see another SDK version https://software-dl.ti.com/processor-sdk-linux-rt/esd/AM335X/08_02_00_24/exports/docs/linux/Industrial_Protocols_PTP.html?highlight=pps_enable uses kernel 5.10 which might work for your case. One I idea I have is maybe you can download and install the wic image for the ICE board and then extract the /sys/class/ptp/ptp1/pps_enable binary over to your BBB and try running that.

Haseeb Afzal Mir said:

The device tree you mentioned is for the ICE board . I am using the BBB . uses the same TI chip . we can change the above mentioned device tree file with my own desired right ? 

As long as the changes are specific to just the pinmux and the IEP settings then I think it should be fine to change your dts in a same manner (since its the same TI SoC). 

-Daolin

Daolin Qiu said:

then how are you syncing/connecting your Garmin 18x LVC with the PTP server you have? My understanding is that in order for time synchronization to occur there must be some protocol that is running (e.g. all PTP devices use PTP for synchronization which ensures all PPS signals are synchronized).

Good question . I also asked the same. From my understanding the PTP server is also positioning its second boundary from the GPS only . and another source I have GARMIN 18x LVC, it gives us directly the PPS. So I assume that all the GPS's would be in sync right ? Garmin 18x gives the PPS outout which is synchronized with the second boundary . and hence our ptp server derived should also be so . That is the concept. 

Daolin Qiu said:

install the wic image for the ICE board and then extract the /sys/class/ptp/ptp1/pps_enable binary over to your BBB and try running that.

I will try doing that but seems more like a hack . official ti-patched kernel doesn't support the pps_enable ? Or it gets added at the board level in ice ?

EDIT 1 :  I tried to see the dtsi files in here .  "am33xx.dtsi" which is the top level node doesn't have a "pruss" node at all . 

Then  am335x-bone-common.dtsi  also doesn't . and so does the am335x-bone-black.dtsi" has any node or either "pruss" or "Iep"....


wix image copying is long .  I rebuild the config with pruss drivers but the tree node is not availble . Can you tell me if you have to write them yourself r this kernel version not supported ?

Hi Haseeb,

Haseeb Afzal Mir said:

PTP server is also positioning its second boundary from the GPS only

Even if PTP server and GPS are positioning to same second boundary (assuming same UTC second), my understanding is that this wouldn't account for any drift due to any software jitter or interrupt latency differences between the GPS device and PTP devices. The PPS signal also only tells you when a second starts but not which second of day the time starts so I think another mechanism is needed for synchronization between the GPS PPS and PTP PPS. 

After some research I found this ts2phc Linux utility tool that might be of some interest to this use-case of yours, maybe you can try it out? https://linuxptp.nwtime.org/documentation/ts2phc/

Haseeb Afzal Mir said:

I will try doing that but seems more like a hack . official ti-patched kernel doesn't support the pps_enable ? Or it gets added at the board level in ice ?

Yes I agree it is more of a hack and I know wic image flash take a bit of time (shouldn't be more than 15 min though) but I think it is the quickest way to obtain the binary without having to do a lot of reverse engineering to figure out how to obtain/build it for the BBB on your system.

I also think pps_enable is more of a user-space application rather than part of the kernel space, so this involves the filesystem rather than the kernel having to include the binary. So I think the fact that you don't see pps_enable included in your BBB image likely means your BBB filesystem just doesn't have the pps_enable included. To prove this, you can even use the TI SDK wic image for the ICE and replace the kernel with your BBB kernel + replace dtb with your BBB dtb and check is pps_enable is available. Where are you obtaining your BBB filesystem from? 

-Daolin

Hello,

Are you using CPSW for Ethernet, or PRU Ethernet? Please keep in mind that PRU Ethernet is only supported on the AM335x ICEv2 board - the beagleBone Black board only has the CPSW connected to the Ethernet PHY.

Regards,

Nick

And from my quick read through the internet . CPSW doesnt have a driver that can essentially give me a pps ? 

After running my phy2sys . Can i not just toggle a gpio and it need be synchronised at the system clock boundary without OS delays ? I tried RT_PREEMPT reduces latency but not much . I need a sub ns pps latency . It gives me milli secs. 

Daolin Qiu 

Daolin Qiu said:

I also think pps_enable is more of a user-space application rather than part of the kernel space, so this involves the filesystem rather than the kernel having to include the binary.

I have been having a hard time finding the .wic image . I think it is supported on older kernels and new ones don't have it . They have removed it from newer file systems too . 

Gosh ! .

Any good suggestions ?

Hello Haseeb, 

Haseeb Afzal Mir said:

Then  am335x-bone-common.dtsi  also doesn't . and so does the am335x-bone-black.dtsi" has any node or either "pruss" or "Iep"....

Apologies that I did not mention this earlier, I double checked internally with an expert on AM335x PTP use and learned that BBB doesn't actually pin out the PRU-ICSS pins and only supports CPSW pinouts. For that reason you cannot simply use the same ICE board device-tree in place of the BBB device-tree and you will have to ensure the pruss and iep nodes are removed and for BBB you can only use CPSW CPTS for PPS.

The same pps_enable would be used but I believe that you would need to use /sys/class/pps/pps0 (associated with ptp0 which is the CPSW CPTS timer):

ptp clock names:
/sys/class/ptp/ptp0 : CTPS timer
/sys/class/ptp/ptp1 : PRUSS2 timer
pps's ptp device:
/sys/class/pps/pps0 : ptp0
/sys/class/pps/pps1 : ptp1

-Daolin

Daolin Qiu said:

The same pps_enable would be used but I believe that you would need to use /sys/class/pps/pps0 (associated with ptp0 which is the CPSW CPTS timer):

Do I need to use some particular file system for it ??? Apart from the CTPS timer I don't see a pps0 or ptp1 . Attaching the image below .

I am using the Ti's patched kernel : 5.10.168-ti-r83 . 

Have they ditches the drivers or i have to recompile the kernel with these drivers enabled ? 

This was quick . Connected my Pi5  as Master and BB as slave and worked . Using amc33x-pps.dtb without full sdk install . Will try it out tomorrow in the Lab with actual server . Hope it works and I get a better latency .

Thanks man ..

No problem, let us know if you need additional guidance! Thanks for your patience as we worked through this with you, I know using a separate timer to generate an output clock from the CPSW is not an obvious solution.

Future readers, if you are using more recent processors like AM64x & AM62x, you can also generate a PPS output from the CPTS counter within the CPSW peripheral. On those later devices, we directly pinned out the PPS signal from the CPTS module, so you do not need to use a separate timer module as an in-between. Refer to the SDK docs for those devices for more information.

Regards,

Nick