Part Number: TMS570LC4357-EP
Dear support,
I'm interfacing an asynchronous SRAM with the TMS570LC4357-EP EMIF interface. My SRAM is a 16bit Data Device and 20bit Address Signals, with high and low Byte enable signals (BE[1:0]). I understood from TI datasheet that I need to connect:
- EMIF_A[x:0] to A[(x+1):1]
- EMIF_BA[1] to A[0]
- EMIF_nDQM[1:0] to BE[1:0]
Could you please confirm the above connection and let me know how to connect EMIF_BA[0]?
Thank you for your kind support.