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AM13E23019: AM13E23019, how to allocate ISR in SRAM?

Ari Mendes
Intellectual 495 points

Part Number: AM13E23019
Other Parts Discussed in Thread: DRV8323

Hi,

The AM13E23019 SDK has an example project, "1sh_sl_foc_drv8329a", which demonstrates allocating a function in SRAM. This function is called from an ISR, but the ISR is allocated in flash memory. In the applications I create with the STM32G4, which also has an area of ​​SRAM for executing code (CCM-SRAM), there's a procedure to allocate interrupt vectors in SRAM (AN4296 document, link below). This is done in the routine "startup_stm32g474xx.a", where after the RESET, the interrupt vectors are copied from flash memory to the SRAM area called CCMRAM. The advantage is that when an interrupt occurs, all the code runs in SRAM without needing to call a function allocated in SRAM, thus increasing performance.

How could I do something equivalent for the AM13E23019?

https://www.st.com/resource/en/application_note/an4296-use-stm32f3stm32g4-ccm-sram-with-iar-embedded-workbench-keil-mdkarm-stmicroelectronics-stm32cubeide-and-other-gnubased-toolchains-stmicroelectronics.pdf

Ari

 

  • 0
    TI__Expert 4595 points

    Hi Ari,

    The expert for this topic is currently OOO, please expect a reply in 2 weeks.

    Thanks,

    Ira

  • 0 in reply to Ira Thete
    TI__Mastermind 32695 points

    Hi Ari,

    You can use the macro RAMFUNC similar to how it is done for some of the Flash driver functions

    Eg: RAMFUNC void DL_FRI_setZeroReadWaitStates(void)

    This places the function in a separate section which is loaded to Flash, and copied to RAM.

    Regards,

    Veena

  • 0 in reply to Veena Kamath
    Intellectual 495 points

    Veena Kamath,

      

    Using the RAMFUNC macro or "__attribute__((section(".TI.ramfunc")))", as explained in the linker.cmd file, for normal functions I had already tested and knew it worked, I was in doubt if it would work directly for an interrupt routine, because in the case of an STM32 project using gcc, it is necessary to copy the interrupt vectors to SRAM and inform the address of this vector in NVIC.

    But to my surprise, when using "_attribute__((section(".TI.ramfunc")))" in the interrupt routine, it allocates the routine from SRAM and it is called correctly when the interrupt occurs, somehow the TI compiler, in addition to copying the routine to SRAM, modifies the interrupt vector in NVIC.
    I just found it strange that in the example "1sh_sl_foc_drv8329a" it didn't use MOTOR_CTRL_RAMFUNC ADC0_INT1_IRQHandler(void) to allocate the interrupt directly in SRAM, and instead only allocated in SRAM the functions that are called by the ISR.

    Ari

  • +1 in reply to Ari Mendes
    TI__Mastermind 32695 points

    Hi Ari,

    If you use .TI.ramfunc and using TI compiler, it automatically copies form Flash to RAM before entering main (automatic copy is done if BINIT is used as shown in the linker cmd file). Same with IAR compiler as well. Also any references to the address of a function marked as RAMFUNC will give you the address in RAM. Hence you see the vector table updated with RAM address.

    GCC compiler support is noy yet added in the SDK and will be added in the upcoming release in Jun.

    Regarding your query on the motorcontrol example, I have looped in the motor control expert. He will respond to you soon,

    Regards,

    Veena

  • +1 in reply to Ari Mendes
    TI__Intellectual 1130 points

    Hi Ari,

              Thanks for spotting that in Single shunt example the Interrupt handler is not placed in the RAM. It is just a miss in this example and 3 shunt example (3sh_sl_foc_drv8323) correctly places both ISR call and inside functions in the RAM. We recommend placing Interrupt vector and any time critical function calls in the RAM_C section.