Part Number: MSPM33-SDK
Other Parts Discussed in Thread: SYSCONFIG
Hi,
According to slasfb6 , shows that the SPI can reach 25 MHz as below.
I have configured the SPI pins under UC2 which is SDIO , and the VDD = 3.3 V according the table above.

It seems like the SPI having the clock source from MCLK/2 (80MHz), which is impossible to have 25 MHz of SPI clock as the SCR =1 ( I captured this formula from the ti_msp_dl_config.c ) , is there any other ways to select the clock source from MCLK/2 (80MHz) to MCLK (160MHz) , to achieve 25 MHz.




CCS's version : 20.5.0.28__1.11.0
SDK's version : 1.3.0.01
SysConfig's version : 1.27.0