AM2612: AM2612 - Clarification on WARMRSTn functionality

Part Number: AM2612

Hello TI team,

We are using the AM2612 device in one of our design. We have observed that the WARMRSTn pin is driven low, there is no reset functionality observed on the MCU side.

We would like to understand the exact purpose and functionality of the WARMRSTn pin, and what condition it is expected to trigger a reset

Note: When the PORz pin is driven low, the reset behavior is as expected

Could you please help to clarify this behaviour?

Thank you,

Anand

  • We are using a watchdog timer in our design, and its output is currently connected to the WARMRSTn pin. We have some concerns about this connection, so could you please provide guidance on whether the watchdog timer output should be connected to the WARMRSTn pin or PORz pin?

  • Hi Anand,

    As mentioned in the register descriptions, Warm reset input from PAD is disabled by default. It needs to be enabled in software, before it can be used.

    Regards,

    Sahana

  • It can be connected to either WARMRSTn or PORz, depending on your application usage. Both would work fine, provided you have enabled the Warm reset pad input as replied above.

    Regards,

    Sahana

  • Hi Team,

    AS per API to enable the Warm reset PAD

        /* To enable ONLY PAD (disable all bypass bits including PAD) */
        SOC_configureWarmResetSource(0U);
    Even this we are not seeing any reset in the SW. Expected is to start the program the init process.
    Please provide the any sample SW for the warm reset
  • Hello,

    SOC_configureWarmResetSource(0U);

    This API doesn't seem to have been implemented correctly. I will raise an internal bug to get this corrected. Meanwhile, please use this updated API definition in the soc_rcm.c file and re-build the libraries before rebuilding the project, for it to take effect.

    void SOC_configureWarmResetSource(uint32_t source)
    {
        CSL_top_rcmRegs *ptrTOPRCMRegs;
        //uint32_t regVal;
    
        ptrTOPRCMRegs = SOC_rcmGetBaseAddressTOPRCM();
    
        /* Unlock CONTROLSS_CTRL registers */
        SOC_controlModuleUnlockMMR(SOC_DOMAIN_ID_MAIN, TOP_RCM_PARTITION0);
    
        //regVal = ptrTOPRCMRegs->WARM_RESET_CONFIG;
        CSL_REG32_WR(&ptrTOPRCMRegs->WARM_RESET_CONFIG, source);
    
        /* Lock CONTROLSS_CTRL registers */
        SOC_controlModuleLockMMR(SOC_DOMAIN_ID_MAIN, TOP_RCM_PARTITION0);
    
    }

    Thanks,

    Sahana

  • Hi Sahana,

    Please find the result after the update as suggested.

    Its showing the different issue

  • Hello,

    Is the data abort seen when executing "SOC_configureWarmResetSource" or after the Warm reset input is provided on the pin? Which Instruction is causing the data abort? Can you look at the CP15_DATA_FAULT_ADDRESS under System Registers ?

    Regards,

    Sahana

  • Hi,

    The data abort seen while executing the SOC_configureWarmResetSource.

  • It is still trying to write into 0x00770077 which was the value of regval (previous value of ptrTOPRCMRegs->WARM_RESET_CONFIG)

    Can you please share your updated code in soc_rcm.c ? Is it updated to this 

    void SOC_configureWarmResetSource(uint32_t source)
    {
        CSL_top_rcmRegs *ptrTOPRCMRegs;
        //uint32_t regVal;
    
        ptrTOPRCMRegs = SOC_rcmGetBaseAddressTOPRCM();
    
        /* Unlock CONTROLSS_CTRL registers */
        SOC_controlModuleUnlockMMR(SOC_DOMAIN_ID_MAIN, TOP_RCM_PARTITION0);
    
        //regVal = ptrTOPRCMRegs->WARM_RESET_CONFIG;
        CSL_REG32_WR(&ptrTOPRCMRegs->WARM_RESET_CONFIG, source);
    
        /* Lock CONTROLSS_CTRL registers */
        SOC_controlModuleLockMMR(SOC_DOMAIN_ID_MAIN, TOP_RCM_PARTITION0);
    
    }

  • Hi

    Yes, updated code is as above, and lib is built using the make commands 

    gmake -j libs-scrub DEVICE=am261x

     

    gmake -j libs DEVICE=am261x INSTRUMENTATION_MODE=yes

     

    and code:

    void SOC_configureWarmResetSource(uint32_t source)

    {

        CSL_top_rcmRegs *ptrTOPRCMRegs;

        uint32_t regVal;

     

        ptrTOPRCMRegs = SOC_rcmGetBaseAddressTOPRCM();

     

        /* Unlock CONTROLSS_CTRL registers */

        SOC_controlModuleUnlockMMR(SOC_DOMAIN_ID_MAIN, TOP_RCM_PARTITION0);

     

       // regVal = ptrTOPRCMRegs->WARM_RESET_CONFIG;

        CSL_REG32_WR(&ptrTOPRCMRegs->WARM_RESET_CONFIG, source);

     

        /* Lock CONTROLSS_CTRL registers */

        SOC_controlModuleLockMMR(SOC_DOMAIN_ID_MAIN, TOP_RCM_PARTITION0);

     

    }

    is build commands are correct ?

  • Please use this to avoid warnings while building:

    void SOC_configureWarmResetSource(uint32_t source)
    {
        CSL_top_rcmRegs *ptrTOPRCMRegs;
        uint32_t regVal;
    
        ptrTOPRCMRegs = SOC_rcmGetBaseAddressTOPRCM();
    
        /* Unlock CONTROLSS_CTRL registers */
        SOC_controlModuleUnlockMMR(SOC_DOMAIN_ID_MAIN, TOP_RCM_PARTITION0);
    
        regVal = (uint32_t)&(ptrTOPRCMRegs->WARM_RESET_CONFIG);
        CSL_REG32_WR(regVal, source);
    
        /* Lock CONTROLSS_CTRL registers */
        SOC_controlModuleLockMMR(SOC_DOMAIN_ID_MAIN, TOP_RCM_PARTITION0);
    
    }

    The commands to build libs is correct. After that, please do a clean and rebuild of the project.

    Thanks,

    Sahana

  • Hi 

    We have tested the changes, Still the issue is same as described earlier its getting into data abort

  • As a workaround, can you please try including the soc_rcm.c file with the changes inside your project directory and check if it then works fine?

  • At my end, it works fine after this change.

    Please use this to avoid warnings while building:

    Fullscreen
    1
    2
    3
    4
    5
    6
    7
    8
    9
    10
    11
    12
    13
    14
    15
    16
    17
    void SOC_configureWarmResetSource(uint32_t source)
    {
    CSL_top_rcmRegs *ptrTOPRCMRegs;
    uint32_t regVal;
    ptrTOPRCMRegs = SOC_rcmGetBaseAddressTOPRCM();
    /* Unlock CONTROLSS_CTRL registers */
    SOC_controlModuleUnlockMMR(SOC_DOMAIN_ID_MAIN, TOP_RCM_PARTITION0);
    regVal = (uint32_t)&(ptrTOPRCMRegs->WARM_RESET_CONFIG);
    CSL_REG32_WR(regVal, source);
    /* Lock CONTROLSS_CTRL registers */
    SOC_controlModuleLockMMR(SOC_DOMAIN_ID_MAIN, TOP_RCM_PARTITION0);
    }
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    The commands to build libs is correct. After that, please do a clean and rebuild of the project.

  • Hi Sahana,

    Thank you for the update, the above fix worked.