AM625: driver strength in SDK8.3 dts

Part Number: AM625
Other Parts Discussed in Thread: AM62P

There is a driver strength setting in SDK8.3 dts for eMMC.

&sdhci0 {
    pinctrl-names = "default";
    pinctrl-0 = <&main_mmc0_pins_default>;
    ti,driver-strength-ohm = <50>;
    disable-wp;
};

relevant code sdhci_am654.c

    /* Configure DLL driver strength */
    mask |= DR_TY_MASK;
    val |= sdhci_am654->drv_strength << DR_TY_SHIFT;
    regmap_update_bits(sdhci_am654->base, PHY_CTRL1, mask, val);

   It configues MMC_SSCFG_PHY_CTRL_1_REG Name Register other than register CTRLMMR_SDIO0_CTRL(0x430041b4) 

And the register field discripton has not driver strength content, so what did it configured.