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AM263P4-Q1: Regarding MPU Firewall Configuration When Using Lockstep Mode

Imaoka Daisaku
Intellectual 370 points

Part Number: AM263P4-Q1
Other Parts Discussed in Thread: SYSCONFIG

The program memory region (OCSRAM) for Core0-0 is protected using the MPU Firewall, with write access from other cores disabled.
We are planning to operate Core0-1 in lockstep mode under this configuration.
In this case, is it required to permit write access from Core0-1 to the Core0-0 memory region?

  • 0
    TI__Expert 7116 points

    Hello,

    Could you please clarify if you're referring to the ARM MPU or the system MPU Firewall?

    Regards,

    Sahana

  • 0 in reply to Sahana H G
    Intellectual 370 points

    Hi, Sahana

    This refers to the "SET FIREWALL" configuration in SysConfig, which we understand to be equivalent to "the system MPU Firewall."

    Since Core0-1 is operated in lockstep mode, we believe it cannot be configured via SysConfig.
    Therefore, we assume that ARM MPU configuration for Core0-1 is not possible.

    Could you please confirm whether this understanding is correct?

    Regards, Imaoka

  • 0 in reply to Imaoka Daisaku
    TI__Expert 7116 points

    Hello,

    Imaoka Daisaku said:
    Could you please confirm whether this understanding is correct?

    Yes, this understanding is correct.

    Let me get back to you on this by June 5.

    Regards,

    Sahana

  • 0
    TI__Expert 7116 points

    Hi Imaoka,

    Imaoka Daisaku said:
    We are planning to operate Core0-1 in lockstep mode under this configuration.
    In this case, is it required to permit write access from Core0-1 to the Core0-0 memory region?

    No, this is not required. 

    In lockstep mode, CPU1’s core logic runs the same instruction stream as CPU0 purely for error comparison purposes. Critically, CPU1’s bus interfaces are inactive — so CPU1 will not generate any memory accesses to OCSRAM or any other SoC resource. 


    Therefore, granting write access from CPU1 to the Core0-0 memory region is neither required nor meaningful at runtime. That said, from a functional safety standpoint, it is still good practice to explicitly configure the firewall/MPU to deny CPU1 access — so that if the system is ever reconfigured to split mode, there is no unintended permissive rule left open.

    Regards,

    Sahana