Part Number: AM263PX-RESTRICTED-SECURITY
Hi Team ,
We know there is a firewall called R5SS0_CORE_AXIS_SLV, which is a target-side MPU. From the table provided in the TRM, R5FSS0_0 core can be connected to all the initiators, but there is no connection between initiator R5FSS0_0 and target R5FSS0_0. However, R5FSS0_0 is provided as an initiator option in the MPU R5SS0_CORE_AXIS_SLV. Why?
Hi,
R5SS0_CORE0_AXIS_SLV protects the following memories: R5SS0_ CORE0_ TCMA, R5SS0_ CORE0_ TCMB, R5SS0_ CORE0_I CACHE, R5SS0_ CORE0_ DCACHE, R5SS0_ CORE0_ TMU
The core would access it's own TCM through it's own path (using the local address) and not through the interconnect (using global address) where this firewall is present. Hence, there is no connection shown between initiator R5FSS0_0 and target R5FSS0_0.
R5FSS0_0 is provided as an initiator option in the MPU R5SS0_CORE_AXIS_SLV.
This would block the interconnect path but would allow the core to access it's TCM for example using the local address "0x00080000". Hope this is clear.
Regards,
Sahana
