Part Number: AM263P4-Q1
I prototyped ECC detection for OCSRAM based on the following ECC MSS L2 sample. However, after calling the SDL_ECC_injectError function, there are cases where the ESM callback function is invoked and cases where it is not.
https://software-dl.ti.com/mcu-plus-sdk/esd/AM263PX/09_02_00_56/exports/docs/api_guide_am263px/SDL_ECC_PAGE.html#autotoc_md1214
I have two questions.
(1) Is there a possibility that if testLocationValue = injectErrorConfig.pErrMem[0]; hits the cache, it does not access the actual memory and therefore fails to detect the error?
If yes, wouldn’t it be necessary to disable the cache before the error injection test code, and then re-enable it afterward, as shown below?
If not, please explain the possible causes why the callback function is not invoked and the corresponding countermeasures.
CacheP_wbInvAll(CacheP_TYPE_ALL);
CacheP_disable(CacheP_TYPE_ALL);
__asm__ volatile ("" ::: "memory"); /* memory barrier */
SDL_ECC_injectError(...);
__asm__ volatile ("" ::: "memory"); /* memory barrier */
testLocationValue = injectErrorConfig.pErrMem[0];
CacheP_wbInvAll(CacheP_TYPE_ALL);
CacheP_enable(CacheP_TYPE_ALL);
(2) In the 2‑bit error sample, there is code that specifies the bit pattern to flip for error injection, such as:
injectErrorConfig.flipBitMask = 0x30002;
The value 0x30002 flips 3 bits rather than 2 bits. Is there any specific reason for this? The comment states “2 bit error,” but since it actually affects more than 2 bits, is it intentionally using 3 bits for testing?
Also, if we simply use 0x03 to flip only 2 bits, would we obtain the same result?
