Part Number: MSPM0G3507
I am trying to configure the SPI peripheral to operate in peripheral mode with 16-bit transfers in Motorola format. I would like to use a controller device to transfer multiple words to the peripheral (and receive data in response), ideally without de-asserting CS between words. However, the following text is in 25.2.3.1 of the reference manual:
For continuous back-to-back transmissions, the CS signal must pulse high between each data word transfer because the peripheral-select pin freezes the data in its serial peripheral register and does not allow altering of the data if the SPH bit is clear. The controller device must raise the CS pin of the peripheral device between each data transfer to enable the serial peripheral data write.
My understanding of this is that CS must be pulsed high by the controller after each 16-bit word. Have I understood this correctly?