AM2612: AM2612A ZNC package SysConfig configuration inquiries

1. Yes ZNC can support 500Mhz, it was a bug in the syscfg meta data for the AM261x that we discovered recently, apologies for the inconvinience here. This will be fixed with next syscfg release

 AM2612: ZNC Package - Sysconfig - Cannot set core clock to 500MHz 

Junsin Park said:

. Reference example or SysConfig guide for using FSI as SPI

• We plan to use FSI0 (specifically pins GPIO29 to GPIO32) for SPI communication.
• Question: Could you provide or recommend a reference SysConfig profile or example project that demonstrates how to configure and use FSI as an SPI interface?

While the FSI SPI compatibility mode is able to match the physical interface of a regular SPI, it is not equivalent to a regular SPI module and has some specific limitations.

• FSI-SPI can only transmit and receive the frame format below, therefore it can only interface with SPI devices that can receive/transmit this frame structure. The Data words section consists of 1 to 16 configurable 16-bit words.

Please confirm that the SPI device on other end is compatible with this format

Junsin Park said:

4. QSPI Configuration reference for Flash Memory (AT25FF161A)

• We are trying to interface the AT25FF161A flash memory using QSPI0 (D0~D3/CLK pins).
• Question: Is there any reference SysConfig setting or example project for interfacing this specific flash memory (or similar) over QSPI?

Any guidance or documentation on these points would be greatly appreciated.

You can refer to this:

software-dl.ti.com/.../CUSTOM_FLASH_SUPPORT_GUIDE.html

Junsin Park said:

2. UART4 and UART5 support on ZNC package

• When enabling UART4 or UART5 in SysConfig, the following build errors occur due to undeclared identifiers in ti_power_clock_config.c:
  
     Arm Compiler - building file: "syscfg/ti_power_clock_config.c"
  "C:/ti/ccs2051/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/bin/tiarmclang.exe" -c -mcpu=cortex-r5 -mfloat-abi=hard -mfpu=vfpv3-d16 -mlittle-endian -mthumb -I"C:/ti/ccs2051/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c" -I"C:/ti/ind_comms_sdk_am261x_2026_00_00_06_eval/source" -I"C:/ti/mcu_plus_sdk_am261x_26_00_00_06/source" -I"C:/ti/mcu_plus_sdk_am261x_26_00_00_06/source/kernel/freertos/FreeRTOS-Kernel/include" -I"C:/ti/mcu_plus_sdk_am261x_26_00_00_06/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F" -I"C:/ti/mcu_plus_sdk_am261x_26_00_00_06/source/kernel/freertos/config/am261x/r5f" -I"C:/ti/ind_comms_sdk_am261x_2026_00_00_06_eval/source/industrial_comms/ethercat_subdevice/beckhoff_stack/stack_sources" -I"C:/ti/ind_comms_sdk_am261x_2026_00_00_06_eval/source/industrial_comms/ethercat_subdevice/beckhoff_stack/stack_hal" -I"C:/ti/ind_comms_sdk_am261x_2026_00_00_06_eval/examples/industrial_comms/ethercat_subdevice_beckhoff_ssc_demo/" -I"D:/@DevDocs/Sources/SafetyActuator/actuator/mcu_am2612a/include/tiesc" -DSOC_AM261X -DOS_FREERTOS -DTIESC_APPLICATION=1 -D_DEBUG_=1 -gdwarf-3 -Wall -Wno-gnu-variable-sized-type-not-at-end -Wno-unused-function -Wno-self-assign -Wno-parentheses-equality -Wno-tautological-constant-out-of-range-compare -Wno-address-of-packed-member -Wno-tautological-pointer-compare -MMD -MP -MF"syscfg/ti_power_clock_config.d_raw" -MT"syscfg/ti_power_clock_config.o" -I"D:/@DevDocs/Sources/SafetyActuator/actuator/mcu_am2612a/Debug/syscfg"   -o"syscfg/ti_power_clock_config.o" "syscfg/ti_power_clock_config.c"
  [7]syscfg/ti_power_clock_config.c:63:5: error: use of undeclared identifier 'SOC_RcmPeripheralId_LIN5_UART5'
     63 |     SOC_RcmPeripheralId_LIN5_UART5,
        |     ^
  [8]syscfg/ti_power_clock_config.c:65:5: error: use of undeclared identifier 'SOC_RcmPeripheralId_LIN4_UART4'
     65 |     SOC_RcmPeripheralId_LIN4_UART4,
        |     ^
  [9]syscfg/ti_power_clock_config.c:89:7: error: use of undeclared identifier 'SOC_RcmPeripheralId_LIN5_UART5'
     89 |     { SOC_RcmPeripheralId_LIN5_UART5, SOC_RcmPeripheralClockSource_DPLL_PER_HSDIV0_CLKOUT0, 192000000},
        |       ^
  [10]syscfg/ti_power_clock_config.c:91:7: error: use of undeclared identifier 'SOC_RcmPeripheralId_LIN4_UART4'
     91 |     { SOC_RcmPeripheralId_LIN4_UART4, SOC_RcmPeripheralClockSource_DPLL_PER_HSDIV0_CLKOUT0, 192000000},
        |       ^
  4 errors generated.
  
  
• Question: Are UART4 and UART5 fully supported in the ZNC package? If yes, how can I resolve these compilation errors?
   

Let me get back on this one.

The issue is that when I build and run the project with this automatically generated 400MHz configuration, the MCU hangs during the boot process inside the PowerClock_init() function. Here is the exact call stack leading to the hang:

_DebugP_assert() 0x70099CAE (DebugP_log.c:105:15)
SOC_rcmGetModuleClkDivVal() 0x7009CAEC (soc_rcm.c:1651:20)
SOC_rcmSetPeripheralClock() 0x700940B0 (soc_rcm.c:2400:16)
SOC_moduleSetClockFrequency() 0x7009F5F8 (soc.c:72:14)
Module_clockSetFrequency() 0x7009C422 (ti_power_clock_config.c:126:16)
PowerClock_init() 0x700A31FA (ti_power_clock_config.c:141:1)
System_init() 0x7009BA24 (ti_drivers_config.c:524:5)
main() 0x70098A9E (main.c:69:5)

1. Is this boot hang directly caused by the 500MHz SysConfig metadata bug? (i.e., SysConfig generating incompatible/broken clock configurations for the ZNC package when it automatically forces the 400MHz limit?)
2. Is there a temporary workaround to bypass this hang and successfully boot the device right now? Could you guide us on how to manually override the clock settings in the source code or script files to force a working clock configuration?
3. What is the estimated release schedule for the next SysConfig version that contains the official metadata fix for the AM261x ZNC package?

Sure Junsin, I will work on sharing a workaround to you.

Hi Junsin,

Thank you for the detailed report. In addition to Nilabh's responses, I want to address each of your questions and provide clarity on the current status of all four items.

1. R5F 500MHz on ZNC Package / Boot Hang in PowerClock_init()

To answer your three sub-questions directly:

The boot hang in PowerClock_init() is directly related to the SysConfig metadata bug. When SysConfig forces the 400MHz limit on the ZNC package, the generated ti_power_clock_config.c contains a clock configuration that SOC_rcmGetModuleClkDivVal() cannot resolve to a valid hardware divider value, which triggers the DebugP_assert() failure you are seeing. The ZNC package hardware does support 500MHz operation. This is purely a metadata issue in the current SysConfig release.

As a workaround, we have a custom SysConfig installer available that includes corrected device data for all AM261x devices and packages, with both 400MHz and 500MHz variants properly defined. To use it, please follow the steps below.

Install the custom SysConfig build to a separate directory from your current SysConfig installation so that your existing environment is not affected. Once installed, navigate to the following location within the custom install directory:

<custom_syscfg_install>/.metadata/product.json

Open your existing project's .syscfg file in a text editor and locate the product reference at the top of the file. Update the path to point to the custom SysConfig installation's metadata instead of your current one. Alternatively, in CCS you can update the SysConfig product reference by going to:

Project Properties -> Products -> SysConfig

And pointing it to the custom install location. Once the updated product data is loaded, you will be able to select 500MHz for the R5F clock on the ZNC package without encountering the metadata restriction. Regenerate SysConfig after making this change and confirm that ti_power_clock_config.c reflects the correct 500MHz PLL settings. Once confirmed, set the PRU-ICSS IEP Clock back to 250MHz, which will again be valid at the 500MHz R5F clock rate and will clear errors [4] and [5] from the EtherCAT example.

Please let me know if you would like me to send over the custom installer, and I will get that to you directly.

2. UART4 and UART5 on ZNC Package

The build errors you are seeing indicate that SOC_RcmPeripheralId_LIN4_UART4 and SOC_RcmPeripheralId_LIN5_UART5 are not defined in the current SDK RCM driver for this device variant. We are currently investigating whether this is a hardware availability limitation specific to the ZNC package pinout or a missing definition in the SDK driver.

While you wait for our response, you can perform the following check to help narrow down the cause. Search the SDK source tree for the enum definitions:

grep -r "SOC_RcmPeripheralId_LIN4_UART4" <mcu_plus_sdk_root>/source/ grep -r "SOC_RcmPeripheralId_LIN5_UART5" <mcu_plus_sdk_root>/source/

If these return no results, the definitions are absent from the SDK entirely. If they are found but conditionally compiled out, note which preprocessor guards are controlling them and share that with us. This will help confirm the root cause on our end.

We will follow up with a definitive answer and resolution path once available.

3. FSI as SPI Reference Configuration

Before recommending a configuration path, there is an important compatibility point to verify. FSI in SPI compatibility mode uses a fixed frame structure that is not equivalent to standard SPI. Every transaction includes a mandatory frame tag word, one to sixteen 16-bit data words, and a CRC word. The device on the receiving end must be capable of handling this specific frame structure.

Could you confirm what the target device is that you intend to connect via FSI0 on GPIO29 through GPIO32? If it is a standard SPI peripheral such as a sensor, ADC, or DAC that expects conventional SPI framing, FSI SPI compatibility mode will not function as a direct replacement, and using one of the available MCSPI instances on the AM2612A would be the more appropriate solution. Once you confirm the target device, we can advise on the correct configuration path and point you to the relevant SysConfig setup.

4. QSPI Configuration for AT25FF161A Flash

The Custom Flash Support Guide linked in the previous reply is the correct starting point for this. For your reference, the key parameters you will need when creating a custom flash entry for the AT25FF161A are listed below:

JEDEC ID: 0x1F, 0x47, 0x01 Flash Size: 16 Mbit (2 MB) Page Size: 256 bytes Sector Size: 4 KB Block Size: 32 KB / 64 KB Quad Enable Bit: QE bit in Status Register 2 Dummy Cycles: 6 (Quad Fast Read at 104MHz)

If the AT25FF161A is not already present in the SDK flash topology database, you will need to create a custom entry using these parameters by following the guide. Let us know if you run into any issues during that process.

To summarize the outstanding items on our end: we are confirming the SysConfig fix release timeline for Issue 1 and actively investigating the UART4/UART5 root cause for Issue 2. I will follow up on both as soon as I have confirmed information.

Please let us know the target device for the FSI-SPI question when you get a chance, confirm whether you would like us to send over the custom SysConfig installer, and do not hesitate to reach out if any of the above raises additional questions.

Best Regards,

Zackary Fleenor

Additionally, I have appended our current .syscfg configuration content for your reference.
Due to security policies, I cannot upload the file directly, so I am sharing it as plain text.

/**
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
* @cliArgs --device "AM261x_ZFG" --part "AM2612" --package "ZFG" --context "r5fss0-0" --product "INDUSTRIAL_COMMUNICATIONS_SDK_AM261x@2026.00.00" --product "MCU_PLUS_SDK_AM261x@26.00.00"
* @v2CliArgs --device "AM2612" --package "NFBGA (ZFG)" --variant "500MHz" --context "r5fss0-0" --product "INDUSTRIAL_COMMUNICATIONS_SDK_AM261x@2026.00.00" --product "MCU_PLUS_SDK_AM261x@26.00.00"
* @versions {"tool":"1.27.0+4565"}
*/

/**
* Import the modules used in this configuration.
*/
const flash = scripting.addModule("/board/flash/flash", {}, false);
const flash1 = flash.addInstance();
const adc = scripting.addModule("/drivers/adc/adc", {}, false);
const adc1 = adc.addInstance();
const adc2 = adc.addInstance();
const edma = scripting.addModule("/drivers/edma/edma", {}, false);
const edma1 = edma.addInstance();
const epwm = scripting.addModule("/drivers/epwm/epwm", {}, false);
const epwm1 = epwm.addInstance();
const epwm2 = epwm.addInstance();
const epwm3 = epwm.addInstance();
const epwm4 = epwm.addInstance();
const epwm5 = epwm.addInstance();
const eqep = scripting.addModule("/drivers/eqep/eqep", {}, false);
const eqep1 = eqep.addInstance();
const fsi_rx = scripting.addModule("/drivers/fsi_rx/fsi_rx", {}, false);
const fsi_rx1 = fsi_rx.addInstance();
const fsi_tx = scripting.addModule("/drivers/fsi_tx/fsi_tx", {}, false);
const fsi_tx1 = fsi_tx.addInstance();
const gpio = scripting.addModule("/drivers/gpio/gpio", {}, false);
const gpio1 = gpio.addInstance();
const gpio2 = gpio.addInstance();
const gpio3 = gpio.addInstance();
const gpio4 = gpio.addInstance();
const gpio5 = gpio.addInstance();
const gpio6 = gpio.addInstance();
const gpio7 = gpio.addInstance();
const gpio8 = gpio.addInstance();
const gpio9 = gpio.addInstance();
const gpio10 = gpio.addInstance();
const gpio11 = gpio.addInstance();
const gpio12 = gpio.addInstance();
const gpio13 = gpio.addInstance();
const gpio14 = gpio.addInstance();
const gpio15 = gpio.addInstance();
const gpio16 = gpio.addInstance();
const i2c = scripting.addModule("/drivers/i2c/i2c", {}, false);
const i2c1 = i2c.addInstance();
const i2c2 = i2c.addInstance();
const mcan = scripting.addModule("/drivers/mcan/mcan", {}, false);
const mcan1 = mcan.addInstance();
const mcspi = scripting.addModule("/drivers/mcspi/mcspi", {}, false);
const mcspi1 = mcspi.addInstance();
const mcspi2 = mcspi.addInstance();
const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false);
const pruicss1 = pruicss.addInstance();
const pruicss2 = pruicss.addInstance();
const uart = scripting.addModule("/drivers/uart/uart", {}, false);
const uart1 = uart.addInstance();
const uart2 = uart.addInstance();
const ethercat = scripting.addModule("/industrial_comms/ethercat/ethercat", {}, false);
const ethercat1 = ethercat.addInstance();
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
const dpl_cfg = scripting.addModule("/kernel/dpl/dpl_cfg");
const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false);
const mpu_armv71 = mpu_armv7.addInstance();
const mpu_armv72 = mpu_armv7.addInstance();
const mpu_armv73 = mpu_armv7.addInstance();
const mpu_armv74 = mpu_armv7.addInstance();
const mpu_armv75 = mpu_armv7.addInstance();
const mpu_armv76 = mpu_armv7.addInstance();
const default_linker = scripting.addModule("/memory_configurator/default_linker", {}, false);
const default_linker1 = default_linker.addInstance();
const general = scripting.addModule("/memory_configurator/general", {}, false);
const general1 = general.addInstance();
const region = scripting.addModule("/memory_configurator/region", {}, false);
const region1 = region.addInstance();
const section = scripting.addModule("/memory_configurator/section", {}, false);
const section1 = section.addInstance();
const section2 = section.addInstance();
const section3 = section.addInstance();
const section4 = section.addInstance();
const section5 = section.addInstance();
const section6 = section.addInstance();
const section7 = section.addInstance();
const section8 = section.addInstance();
const section9 = section.addInstance();
const section10 = section.addInstance();
const section11 = section.addInstance();
const section12 = section.addInstance();
const section13 = section.addInstance();
const int_xbar = scripting.addModule("/xbar/int_xbar/int_xbar", {}, false);
const int_xbar1 = int_xbar.addInstance();
const int_xbar2 = int_xbar.addInstance();

/**
* Write custom configuration values to the imported modules.
*/
flash1.$name = "CONFIG_FLASH0";
flash1.device = "CUSTOM_FLASH";
flash1.fname = "AT25FF161A";
flash1.protocol = "1s_1s_4s";
flash1.flashSize = 2097152;
flash1.flashManfId = "0x1F";
flash1.flashDeviceId = "0x4608";
flash1.cmdBlockErase4B = "0xD8";
flash1.cmdSectorErase4B = "0x20";
flash1.cmdRd = "0x6B";
flash1.resetType = "0x30";
flash1.xspiWipRdCmd = "0x00";
flash1.flashPageProgTimeout = 2048;
flash1.enable4BAddr = false;
flash1.cmdExtType = "NONE";
flash1.flashDeviceBusyTimeout = 20000000;
flash1.flashQeType = "5";
flash1.dummyClksRd = 8;
flash1.peripheralDriver.$name = "CONFIG_OSPI0";
flash1.peripheralDriver.OSPI.$assign = "OSPI0";
flash1.peripheralDriver.OSPI.CLK.$assign = "GPIO10";
flash1.peripheralDriver.OSPI.CSn0.$assign = "GPIO62";
flash1.peripheralDriver.OSPI.DQS.$used = false;
flash1.peripheralDriver.OSPI.D7.$used = false;
flash1.peripheralDriver.OSPI.D6.$used = false;
flash1.peripheralDriver.OSPI.D5.$used = false;
flash1.peripheralDriver.OSPI.D4.$used = false;
flash1.peripheralDriver.OSPI.D3.$assign = "GPIO69";
flash1.peripheralDriver.OSPI.D2.$assign = "GPIO7";
flash1.peripheralDriver.OSPI.D1.$assign = "GPIO70";
flash1.peripheralDriver.OSPI.D0.$assign = "GPIO2";
flash1.peripheralDriver.OSPI.RESET_OUT0.$used = false;
flash1.peripheralDriver.child.$name = "drivers_ospi_v0_ospi_v0_am261x_template0";

adc1.$name = "CONFIG_ADC0";
adc1.soc0Trigger = "ADC_TRIGGER_EPWM0_SOCA";
adc1.soc0Channel = "ADC_CH_ADCIN2";
adc1.soc1Channel = "ADC_CH_ADCIN1";
adc1.soc0SampleWindow = 50;
adc1.adcClockPrescaler = "ADC_CLK_DIV_2_5";
adc1.enableTDMA = false;
adc1.socHighPriorityMode = "ADC_PRI_ALL_HIPRI";
adc1.soc1Trigger = "ADC_TRIGGER_EPWM0_SOCA";
adc1.soc1SampleWindow = 50;
adc1.soc2SampleWindow = 50;
adc1.soc2Trigger = "ADC_TRIGGER_EPWM0_SOCA";
adc1.soc3Channel = "ADC_CH_ADCIN4";
adc1.soc3Trigger = "ADC_TRIGGER_EPWM0_SOCA";
adc1.soc3SampleWindow = 50;
adc1.soc4Channel = "ADC_CH_ADCIN3";
adc1.soc4SampleWindow = 50;
adc1.soc4Trigger = "ADC_TRIGGER_EPWM0_SOCA";
adc1.enableConverter = true;
adc1.ADC.$assign = "ADC0";
adc1.ADC.AIN0.$assign = "ADC0_AIN0";
adc1.ADC.AIN1.$assign = "ADC0_AIN1";
adc1.ADC.AIN2.$assign = "ADC0_AIN2";
adc1.ADC.AIN3.$assign = "ADC0_AIN3";
adc1.ADC.AIN4.$assign = "ADC0_AIN4";
adc1.ADC.AIN5.$assign = "ADC0_AIN5";
adc1.ADC.AIN5.$used = false;
adc1.ADC.AIN6.$assign = "ADC0_AIN6";
adc1.ADC.AIN6.$used = false;

adc2.$name = "CONFIG_ADC1";
adc2.adcClockPrescaler = "ADC_CLK_DIV_2_5";
adc2.enableTDMA = false;
adc2.socHighPriorityMode = "ADC_PRI_ALL_HIPRI";
adc2.enableInterrupt1 = true;
adc2.interrupt1SOCSource = "ADC_SOC_NUMBER6";
adc2.interruptPulseMode = "ADC_PULSE_END_OF_CONV";
adc2.enableConverter = true;
adc2.soc0Trigger = "ADC_TRIGGER_EPWM0_SOCA";
adc2.soc0SampleWindow = 50;
adc2.soc0Channel = "ADC_CH_ADCIN6";
adc2.soc1Channel = "ADC_CH_ADCIN5";
adc2.soc1Trigger = "ADC_TRIGGER_EPWM0_SOCA";
adc2.soc1SampleWindow = 50;
adc2.soc2Channel = "ADC_CH_ADCIN4";
adc2.soc2SampleWindow = 50;
adc2.soc3SampleWindow = 50;
adc2.soc3Trigger = "ADC_TRIGGER_EPWM0_SOCA";
adc2.soc4Trigger = "ADC_TRIGGER_EPWM0_SOCA";
adc2.soc4SampleWindow = 50;
adc2.soc4Channel = "ADC_CH_ADCIN1";
adc2.soc5Channel = "ADC_CH_ADCIN2";
adc2.soc6Channel = "ADC_CH_ADCIN3";
adc2.soc5Trigger = "ADC_TRIGGER_EPWM0_SOCA";
adc2.soc5SampleWindow = 50;
adc2.soc6Trigger = "ADC_TRIGGER_EPWM0_SOCA";
adc2.soc6SampleWindow = 50;
adc2.ADC.$assign = "ADC2";
adc2.ADC.AIN0.$assign = "ADC2_AIN0";
adc2.ADC.AIN1.$assign = "ADC2_AIN1";
adc2.ADC.AIN2.$assign = "ADC2_AIN2";
adc2.ADC.AIN3.$assign = "ADC2_AIN3";
adc2.ADC.AIN4.$assign = "ADC2_AIN4";
adc2.ADC.AIN5.$assign = "ADC2_AIN5";
adc2.ADC.AIN6.$assign = "ADC2_AIN6";

epwm1.$name = "PWM_U";
epwm1.epwmTimebase_counterMode = "EPWM_COUNTER_MODE_UP_DOWN";
epwm1.epwmTimebase_counterModeAfterSync = "EPWM_COUNT_MODE_UP_AFTER_SYNC";
epwm1.epwmTimebase_syncOutPulseMode = ["EPWM_SYNC_OUT_PULSE_ON_CNTR_ZERO"];
epwm1.hrpwm_syncSource = "HRPWM_PWMSYNC_SOURCE_ZERO";
epwm1.epwmActionQualifier_EPWM_AQ_OUTPUT_A_shadowMode = true;
epwm1.epwmActionQualifier_continousSwForceReloadMode = "EPWM_AQ_SW_IMMEDIATE_LOAD";
epwm1.epwmActionQualifier_EPWM_AQ_OUTPUT_A_ON_TIMEBASE_UP_CMPA = "EPWM_AQ_OUTPUT_LOW";
epwm1.epwmActionQualifier_EPWM_AQ_OUTPUT_A_ON_TIMEBASE_DOWN_CMPA = "EPWM_AQ_OUTPUT_HIGH";
epwm1.epwmActionQualifier_EPWM_AQ_OUTPUT_A_continuousSwForceAction = "EPWM_AQ_SW_OUTPUT_LOW";
epwm1.epwmActionQualifier_EPWM_AQ_OUTPUT_B_continuousSwForceAction = "EPWM_AQ_SW_OUTPUT_LOW";
epwm1.epwmDeadband_redShadowMode = true;
epwm1.epwmDeadband_fedShadowMode = true;
epwm1.epwmDeadband_polarityFED = "EPWM_DB_POLARITY_ACTIVE_LOW";
epwm1.epwmDeadband_enableRED = true;
epwm1.epwmDeadband_enableFED = true;
epwm1.epwmEventTrigger_EPWM_SOC_A_triggerEnable = true;
epwm1.epwmDeadband_controlShadowMode = true;
epwm1.epwmCounterCompare_cmpA = 1250;
epwm1.epwmEventTrigger_EPWM_SOC_A_triggerEventPrescalar = "1";
epwm1.epwmEventTrigger_enableInterrupt = true;
epwm1.epwmEventTrigger_interruptEventCount = "1";
epwm1.epwmEventTrigger_interruptSource = "EPWM_INT_TBCTR_U_CMPC";
epwm1.epwmEventTrigger_EPWM_SOC_A_triggerSource = "EPWM_SOC_TBCTR_U_CMPC";
epwm1.epwmDeadband_delayFED = 100;
epwm1.epwmDeadband_delayRED = 100;
epwm1.epwmTimebase_period = 2500;
epwm1.EPWM.$assign = "EPWM0";
epwm1.EPWM.A.$assign = "GPIO43";
epwm1.EPWM.B.$assign = "GPIO44";

epwm2.$name = "PWM_V";
epwm2.epwmTimebase_periodLink = "EPWM_LINK_WITH_EPWM_0";
epwm2.epwmTimebase_counterMode = "EPWM_COUNTER_MODE_UP_DOWN";
epwm2.epwmTimebase_counterModeAfterSync = "EPWM_COUNT_MODE_UP_AFTER_SYNC";
epwm2.epwmTimebase_syncInPulseSource = "EPWM_SYNC_IN_PULSE_SRC_SYNCOUT_EPWM0";
epwm2.epwmTimebase_phaseEnable = true;
epwm2.hrpwm_syncSource = "HRPWM_PWMSYNC_SOURCE_ZERO";
epwm2.epwmActionQualifier_continousSwForceReloadMode = "EPWM_AQ_SW_IMMEDIATE_LOAD";
epwm2.epwmActionQualifier_EPWM_AQ_OUTPUT_A_shadowMode = true;
epwm2.epwmActionQualifier_EPWM_AQ_OUTPUT_A_continuousSwForceAction = "EPWM_AQ_SW_OUTPUT_LOW";
epwm2.epwmActionQualifier_EPWM_AQ_OUTPUT_A_ON_TIMEBASE_UP_CMPA = "EPWM_AQ_OUTPUT_LOW";
epwm2.epwmActionQualifier_EPWM_AQ_OUTPUT_A_ON_TIMEBASE_DOWN_CMPA = "EPWM_AQ_OUTPUT_HIGH";
epwm2.epwmDeadband_polarityFED = "EPWM_DB_POLARITY_ACTIVE_LOW";
epwm2.epwmDeadband_enableRED = true;
epwm2.epwmDeadband_enableFED = true;
epwm2.epwmDeadband_controlShadowMode = true;
epwm2.epwmDeadband_redShadowMode = true;
epwm2.epwmDeadband_fedShadowMode = true;
epwm2.epwmCounterCompare_cmpA = 1250;
epwm2.epwmDeadband_delayRED = 100;
epwm2.epwmDeadband_delayFED = 100;
epwm2.epwmTimebase_period = 2500;
epwm2.EPWM.$assign = "EPWM1";
epwm2.EPWM.A.$assign = "GPIO45";
epwm2.EPWM.B.$assign = "GPIO46";

epwm3.$name = "PWM_W";
epwm3.epwmTimebase_periodLink = "EPWM_LINK_WITH_EPWM_0";
epwm3.epwmTimebase_counterMode = "EPWM_COUNTER_MODE_UP_DOWN";
epwm3.epwmTimebase_counterModeAfterSync = "EPWM_COUNT_MODE_UP_AFTER_SYNC";
epwm3.epwmTimebase_syncInPulseSource = "EPWM_SYNC_IN_PULSE_SRC_SYNCOUT_EPWM0";
epwm3.epwmTimebase_phaseEnable = true;
epwm3.hrpwm_syncSource = "HRPWM_PWMSYNC_SOURCE_ZERO";
epwm3.epwmActionQualifier_EPWM_AQ_OUTPUT_A_shadowMode = true;
epwm3.epwmActionQualifier_continousSwForceReloadMode = "EPWM_AQ_SW_IMMEDIATE_LOAD";
epwm3.epwmActionQualifier_EPWM_AQ_OUTPUT_A_continuousSwForceAction = "EPWM_AQ_SW_OUTPUT_LOW";
epwm3.epwmActionQualifier_EPWM_AQ_OUTPUT_A_ON_TIMEBASE_UP_CMPA = "EPWM_AQ_OUTPUT_LOW";
epwm3.epwmActionQualifier_EPWM_AQ_OUTPUT_A_ON_TIMEBASE_DOWN_CMPA = "EPWM_AQ_OUTPUT_HIGH";
epwm3.epwmDeadband_polarityFED = "EPWM_DB_POLARITY_ACTIVE_LOW";
epwm3.epwmDeadband_enableRED = true;
epwm3.epwmDeadband_enableFED = true;
epwm3.epwmDeadband_controlShadowMode = true;
epwm3.epwmDeadband_redShadowMode = true;
epwm3.epwmDeadband_fedShadowMode = true;
epwm3.epwmCounterCompare_cmpA = 1250;
epwm3.epwmDeadband_delayRED = 100;
epwm3.epwmDeadband_delayFED = 100;
epwm3.epwmTimebase_period = 2500;
epwm3.EPWM.$assign = "EPWM2";
epwm3.EPWM.A.$assign = "GPIO47";
epwm3.EPWM.B.$assign = "GPIO48";

epwm4.$name = "MCU_BRK_PWM";
epwm4.epwmTimebase_clockDiv = "EPWM_CLOCK_DIVIDER_4";
epwm4.epwmTimebase_period = 2500;
epwm4.epwmTimebase_counterMode = "EPWM_COUNTER_MODE_UP";
epwm4.epwmActionQualifier_EPWM_AQ_OUTPUT_A_shadowMode = true;
epwm4.epwmActionQualifier_EPWM_AQ_OUTPUT_A_ON_TIMEBASE_ZERO = "EPWM_AQ_OUTPUT_HIGH";
epwm4.epwmActionQualifier_EPWM_AQ_OUTPUT_A_ON_TIMEBASE_UP_CMPA = "EPWM_AQ_OUTPUT_LOW";
epwm4.epwmActionQualifier_continousSwForceReloadMode = "EPWM_AQ_SW_IMMEDIATE_LOAD";
epwm4.EPWM.$assign = "EPWM4";
epwm4.EPWM.A.$assign = "GPIO51";
epwm4.EPWM.B.$used = false;

epwm5.$name = "HEARTBEAT_TO_13E";
epwm5.EPWM.$assign = "EPWM5";
epwm5.EPWM.A.$assign = "GPIO53";
epwm5.EPWM.B.$used = false;

eqep1.$name = "HEARTBEAT_TO_2612";
eqep1.EQEP.$assign = "EQEP1";
eqep1.EQEP.A.$assign = "GPIO37";
eqep1.EQEP.B.$used = false;
eqep1.EQEP.STROBE.$used = false;
eqep1.EQEP.INDEX.$used = false;

fsi_rx1.intrEnable = false;
fsi_rx1.$name = "CONFIG_FSI_RX0_2612MASTER";
fsi_rx1.FSIRX.$assign = "FSIRX0";
fsi_rx1.FSIRX.CLK.$assign = "GPIO32";
fsi_rx1.FSIRX.D0.$assign = "GPIO33";
fsi_rx1.FSIRX.D1.$used = false;
fsi_rx1.child.$name = "drivers_fsi_rx_v0_fsi_rx_v0_template0";

fsi_tx1.$name = "CONFIG_FSI_TX0_2612MASTER";
fsi_tx1.intrEnable = false;
fsi_tx1.FSITX.$assign = "FSITX0";
fsi_tx1.FSITX.CLK.$assign = "GPIO29";
fsi_tx1.FSITX.D0.$assign = "GPIO30";
fsi_tx1.FSITX.D1.$used = false;
fsi_tx1.child.$name = "drivers_fsi_tx_v0_fsi_tx_v0_template0";

gpio1.$name = "TO_AM2612_PMIC_INTn";
gpio1.enableIntr = true;
gpio1.GPIO_n.$assign = "GPIO9";

gpio2.$name = "STATUS_LED";
gpio2.pinDir = "OUTPUT";
gpio2.GPIO_n.$assign = "GPIO55";

gpio3.$name = "ETH0_RST";
gpio3.pinDir = "OUTPUT";
gpio3.defaultValue = "1";
gpio3.GPIO_n.$assign = "GPIO56";

gpio4.pinDir = "OUTPUT";
gpio4.defaultValue = "1";
gpio4.$name = "ETH1_RST";
gpio4.GPIO_n.$assign = "GPIO57";

gpio5.$name = "INT_ACC_1";
gpio5.GPIO_n.$assign = "GPIO140";

gpio6.$name = "INT_ACC_2";
gpio6.GPIO_n.$assign = "GPIO139";

gpio7.$name = "SPI_2612MASTER_CS";
gpio7.pinDir = "OUTPUT";
gpio7.GPIO_n.$assign = "GPIO31";

gpio8.$name = "SAFETY_IN0";
gpio8.GPIO_n.$assign = "GPIO61";

gpio9.$name = "SBC1_MONITOR";
gpio9.GPIO_n.$assign = "GPIO34";

gpio10.$name = "SBC2_MONITOR";
gpio10.GPIO_n.$assign = "GPIO35";

gpio11.$name = "SBC1";
gpio11.pinDir = "OUTPUT";
gpio11.pu_pd = "pd";
gpio11.GPIO_n.$assign = "GPIO36";

gpio12.$name = "STO1";
gpio12.pinDir = "OUTPUT";
gpio12.pu_pd = "pd";
gpio12.GPIO_n.$assign = "GPIO40";

gpio13.$name = "STO2_MONITOR";
gpio13.GPIO_n.$assign = "GPIO39";

gpio14.$name = "STO1_MONITOR";
gpio14.GPIO_n.$assign = "GPIO38";

gpio15.$name = "CURRENT_SENSE_INTRT";
gpio15.pinDir = "OUTPUT";
gpio15.GPIO_n.$assign = "GPIO138";

gpio16.$name = "DRV_EN";
gpio16.pinDir = "OUTPUT";
gpio16.GPIO_n.$assign = "GPIO49";

i2c1.$name = "CONFIG_I2C0_EEPROM";
i2c1.I2C.$assign = "I2C0";
i2c1.I2C.SCL.$assign = "GPIO135";
i2c1.I2C.SDA.$assign = "GPIO134";
i2c1.I2C_child.$name = "drivers_i2c_v1_i2c_v1_template0";

i2c2.$name = "CONFIG_I2C1_PMIC";
i2c2.I2C.$assign = "I2C1";
i2c2.I2C.SCL.$assign = "GPIO131";
i2c2.I2C.SDA.$assign = "GPIO130";
i2c2.I2C_child.$name = "drivers_i2c_v1_i2c_v1_template1";

mcan1.$name = "CONFIG_MCAN0_EXT";
mcan1.MCAN.$assign = "MCAN0";
mcan1.MCAN.RX.$assign = "GPIO59";
mcan1.MCAN.TX.$assign = "GPIO60";

const mcan_v1_template = scripting.addModule("/drivers/mcan/v1/mcan_v1_template", {}, false);
const mcan_v1_template1 = mcan_v1_template.addInstance({}, false);
mcan_v1_template1.$name = "drivers_mcan_v1_mcan_v1_template0";
mcan1.child = mcan_v1_template1;

mcspi1.$name = "CONFIG_MCSPI2_ACC";
mcspi1.advanced = true;
mcspi1.SPI.$assign = "SPI2";
mcspi1.SPI.CLK.$assign = "GPIO20";
mcspi1.SPI.D0.$assign = "GPIO21";
mcspi1.SPI.D1.$assign = "GPIO22";
mcspi1.mcspiChannel[0].$name = "CONFIG_MCSPI_CH0";
mcspi1.mcspiChannel[0].CSn.$assign = "GPIO19";
mcspi1.child.$name = "drivers_mcspi_v1_mcspi_v1_template0";

mcspi2.$name = "CONFIG_MCSPI0_13EMASTER";
mcspi2.mode = "PERIPHERAL";
mcspi2.inputSelect = "0";
mcspi2.dpe0 = "DISABLE";
mcspi2.dpe1 = "ENABLE";
mcspi2.SPI.$assign = "SPI0";
mcspi2.SPI.CLK.$assign = "GPIO1";
mcspi2.SPI.D0.$assign = "GPIO5";
mcspi2.SPI.D1.$assign = "GPIO6";
mcspi2.mcspiChannel[0].$name = "CONFIG_MCSPI_CH1";
mcspi2.mcspiChannel[0].CSn.$assign = "GPIO0";
mcspi2.child.$name = "drivers_mcspi_v1_mcspi_v1_template1";

edma1.$name = "CONFIG_EDMA0";
mcspi1.edmaDriver = edma1;
mcspi2.edmaDriver = edma1;
edma1.edmaRmDmaCh[0].$name = "CONFIG_EDMA_RM0";
edma1.edmaRmQdmaCh[0].$name = "CONFIG_EDMA_RM1";
edma1.edmaRmTcc[0].$name = "CONFIG_EDMA_RM2";
edma1.edmaRmParam[0].$name = "CONFIG_EDMA_RM3";

pruicss2.$name = "CONFIG_PRU_ICSS1";
pruicss2.instance = "ICSSM1";
pruicss2.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO1";

const soc_ctrl_adc = scripting.addModule("/drivers/soc_ctrl/v0/subModules/soc_ctrl_adc", {}, false);
const soc_ctrl_adc1 = soc_ctrl_adc.addInstance({}, false);
soc_ctrl_adc1.$name = "soc_ctrl_adc0";
const soc_ctrl = scripting.addModule("/drivers/soc_ctrl/soc_ctrl", {}, false);
soc_ctrl.soc_ctrl_adc = soc_ctrl_adc1;
adc.adcReferences = soc_ctrl_adc1;

const soc_ctrl_cmpss = scripting.addModule("/drivers/soc_ctrl/v0/subModules/soc_ctrl_cmpss", {}, false);
const soc_ctrl_cmpss1 = soc_ctrl_cmpss.addInstance({}, false);
soc_ctrl_cmpss1.$name = "soc_ctrl_cmpss0";
soc_ctrl.soc_ctrl_cmpss = soc_ctrl_cmpss1;

const soc_ctrl_ecap = scripting.addModule("/drivers/soc_ctrl/v0/subModules/soc_ctrl_ecap", {}, false);
const soc_ctrl_ecap1 = soc_ctrl_ecap.addInstance({}, false);
soc_ctrl_ecap1.$name = "soc_ctrl_ecap0";
soc_ctrl.soc_ctrl_ecap = soc_ctrl_ecap1;

const soc_ctrl_epwm = scripting.addModule("/drivers/soc_ctrl/v0/subModules/soc_ctrl_epwm", {}, false);
const soc_ctrl_epwm1 = soc_ctrl_epwm.addInstance({}, false);
soc_ctrl_epwm1.$name = "soc_ctrl_epwm0";
soc_ctrl.soc_ctrl_epwm = soc_ctrl_epwm1;
epwm.epwmTbClkSync = soc_ctrl_epwm1;

const soc_ctrl_sdfm = scripting.addModule("/drivers/soc_ctrl/v0/subModules/soc_ctrl_sdfm", {}, false);
const soc_ctrl_sdfm1 = soc_ctrl_sdfm.addInstance({}, false);
soc_ctrl_sdfm1.$name = "soc_ctrl_sdfm0";
soc_ctrl.soc_ctrl_sdfm = soc_ctrl_sdfm1;

uart1.$name = "CONFIG_UART3_RS485";
uart1.hwFlowControl = true;
uart1.child.$name = "drivers_uart_v2_uart_v2_template2";
uart1.UART.$assign = "UART3";
uart1.UART.RXD.$assign = "GPIO119";
uart1.UART.TXD.$assign = "GPIO120";
uart1.UART.RTSn.$assign = "GPIO14";
uart1.UART.CTSn.$used = false;

uart2.$name = "DEBUG_UART";
uart2.intrPriority = 8;
uart2.rxTrigLvl = "30";
uart2.readMode = "CALLBACK";
uart2.readCallbackFxn = "debug_uart_read_callback";
uart2.readReturnMode = "PARTIAL";
uart2.UART.$assign = "UART0";
uart2.UART.RXD.$assign = "GPIO27";
uart2.UART.TXD.$assign = "GPIO28";
uart2.child.$name = "drivers_uart_v2_uart_v2_template0";

ethercat1.$name = "CONFIG_ETHERCAT0";
ethercat1["PRU-ICSS0-IEP"].$assign = "PRU-ICSS0-IEP";
ethercat1["PRU-ICSS0-IEP"].PR0_IEP0_EDC_SYNC_OUT0.$used = false;
ethercat1["PRU-ICSS0-IEP"].PR0_IEP0_EDC_SYNC_OUT1.$used = false;
ethercat1["PRU-ICSS0-IEP"].PR0_IEP0_EDIO_DATA_IN_OUT30.$used = false;
ethercat1["PRU-ICSS0-IEP"].PR0_IEP0_EDIO_DATA_IN_OUT31.$used = false;
ethercat1["PRU-ICSS0"].$assign = "PRU-ICSS0";
ethercat1["PRU-ICSS0"].PR0_PRU0_GPIO8.$assign = "GPIO90";
ethercat1["PRU-ICSS0"].PR0_PRU0_GPIO5.$assign = "GPIO87";
ethercat1["PRU-ICSS0"].PR0_PRU0_GPIO6.$assign = "GPIO91";
ethercat1["PRU-ICSS0"].PR0_PRU0_GPIO4.$assign = "GPIO92";
ethercat1["PRU-ICSS0"].PR0_PRU0_GPIO0.$assign = "GPIO93";
ethercat1["PRU-ICSS0"].PR0_PRU0_GPIO1.$assign = "GPIO94";
ethercat1["PRU-ICSS0"].PR0_PRU0_GPIO2.$assign = "GPIO95";
ethercat1["PRU-ICSS0"].PR0_PRU0_GPIO3.$assign = "GPIO96";
ethercat1["PRU-ICSS0"].PR0_PRU0_GPIO16.$assign = "GPIO97";
ethercat1["PRU-ICSS0"].PR0_PRU0_GPIO15.$assign = "GPIO98";
ethercat1["PRU-ICSS0"].PR0_PRU0_GPIO11.$assign = "GPIO99";
ethercat1["PRU-ICSS0"].PR0_PRU0_GPIO12.$assign = "GPIO100";
ethercat1["PRU-ICSS0"].PR0_PRU0_GPIO13.$assign = "GPIO101";
ethercat1["PRU-ICSS0"].PR0_PRU0_GPIO14.$assign = "GPIO102";
ethercat1["PRU-ICSS0"].PR0_PRU1_GPIO8.$assign = "GPIO106";
ethercat1["PRU-ICSS0"].PR0_PRU1_GPIO5.$assign = "GPIO103";
ethercat1["PRU-ICSS0"].PR0_PRU1_GPIO6.$assign = "GPIO107";
ethercat1["PRU-ICSS0"].PR0_PRU1_GPIO4.$assign = "GPIO108";
ethercat1["PRU-ICSS0"].PR0_PRU1_GPIO0.$assign = "GPIO109";
ethercat1["PRU-ICSS0"].PR0_PRU1_GPIO1.$assign = "GPIO110";
ethercat1["PRU-ICSS0"].PR0_PRU1_GPIO2.$assign = "GPIO111";
ethercat1["PRU-ICSS0"].PR0_PRU1_GPIO3.$assign = "GPIO112";
ethercat1["PRU-ICSS0"].PR0_PRU1_GPIO16.$assign = "GPIO113";
ethercat1["PRU-ICSS0"].PR0_PRU1_GPIO15.$assign = "GPIO114";
ethercat1["PRU-ICSS0"].PR0_PRU1_GPIO11.$assign = "GPIO115";
ethercat1["PRU-ICSS0"].PR0_PRU1_GPIO12.$assign = "GPIO116";
ethercat1["PRU-ICSS0"].PR0_PRU1_GPIO13.$assign = "GPIO117";
ethercat1["PRU-ICSS0"].PR0_PRU1_GPIO14.$assign = "GPIO118";
ethercat1["PRU-ICSS0-MDIO"].$assign = "PRU-ICSS0-MDIO";
ethercat1["PRU-ICSS0-MDIO"].PR0_MDIO0_MDIO.$assign = "GPIO85";
ethercat1["PRU-ICSS0-MDIO"].PR0_MDIO0_MDC.$assign = "GPIO86";
ethercat1.ethphy[0].$name = "CONFIG_ETHPHY0";
ethercat1.ethphy[0].mdioPort = 3;
ethercat1.ethphy[1].$name = "CONFIG_ETHPHY1";
ethercat1.ethphy[1].mdioPort = 12;

pruicss1.$name = "CONFIG_PRU_ICSS0";
ethercat1.icss = pruicss1;
pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO0";

mpu_armv71.$name = "CONFIG_MPU_REGION0";
mpu_armv71.size = 31;
mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv71.attributes = "Device";
mpu_armv71.allowExecute = false;

mpu_armv72.$name = "CONFIG_MPU_REGION1";
mpu_armv72.size = 15;
mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD";

mpu_armv73.$name = "CONFIG_MPU_REGION2";
mpu_armv73.baseAddr = 0x80000;
mpu_armv73.size = 15;
mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD";

mpu_armv74.$name = "CONFIG_MPU_REGION3";
mpu_armv74.baseAddr = 0x70000000;
mpu_armv74.size = 21;
mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD";

mpu_armv75.$name = "CONFIG_MPU_REGION4";
mpu_armv75.baseAddr = 0x50D00000;
mpu_armv75.size = 14;
mpu_armv75.attributes = "Device";
mpu_armv75.allowExecute = false;

mpu_armv76.$name = "CONFIG_MPU_REGION5";
mpu_armv76.baseAddr = 0x72000000;
mpu_armv76.size = 14;
mpu_armv76.attributes = "NonCached";
mpu_armv76.allowExecute = false;

default_linker1.$name = "memory_configurator_default_linker0";

general1.$name = "CONFIG_GENERAL0";
general1.stack_size = 32768;
general1.linker.$name = "TIARMCLANG0";

region1.$name = "MEMORY_REGION_CONFIGURATION0";
region1.memory_region.create(12);
region1.memory_region[0].type = "TCMA";
region1.memory_region[0].$name = "R5F_VECS";
region1.memory_region[0].size = 0x40;
region1.memory_region[0].auto = false;
region1.memory_region[1].type = "TCMA";
region1.memory_region[1].$name = "R5F_TCMA";
region1.memory_region[1].size = 0x7FC0;
region1.memory_region[2].type = "TCMB";
region1.memory_region[2].size = 0x8000;
region1.memory_region[2].$name = "R5F_TCMB";
region1.memory_region[3].$name = "SBL";
region1.memory_region[3].auto = false;
region1.memory_region[3].size = 0x40000;
region1.memory_region[4].$name = "OCRAM";
region1.memory_region[4].auto = false;
region1.memory_region[4].manualStartAddress = 0x70080000;
region1.memory_region[4].size = 0x80000;
region1.memory_region[5].type = "FLASH";
region1.memory_region[5].auto = false;
region1.memory_region[5].manualStartAddress = 0x60100000;
region1.memory_region[5].size = 0x80000;
region1.memory_region[5].$name = "FLASH";
region1.memory_region[6].$name = "USER_SHM_MEM";
region1.memory_region[6].auto = false;
region1.memory_region[6].manualStartAddress = 0x70150000;
region1.memory_region[6].size = 0x4000;
region1.memory_region[6].isShared = true;
region1.memory_region[6].shared_cores = ["r5fss0-1"];
region1.memory_region[7].$name = "LOG_SHM_MEM";
region1.memory_region[7].auto = false;
region1.memory_region[7].manualStartAddress = 0x70154000;
region1.memory_region[7].size = 0x4000;
region1.memory_region[7].isShared = true;
region1.memory_region[7].shared_cores = ["r5fss0-1"];
region1.memory_region[8].type = "CUSTOM";
region1.memory_region[8].$name = "RTOS_NORTOS_IPC_SHM_MEM";
region1.memory_region[8].auto = false;
region1.memory_region[8].manualStartAddress = 0x72000000;
region1.memory_region[8].size = 0x3E80;
region1.memory_region[8].isShared = true;
region1.memory_region[8].shared_cores = ["r5fss0-1"];
region1.memory_region[9].type = "CUSTOM";
region1.memory_region[9].$name = "MAILBOX_HSM";
region1.memory_region[9].auto = false;
region1.memory_region[9].manualStartAddress = 0x44000000;
region1.memory_region[9].size = 0x3CE;
region1.memory_region[9].isShared = true;
region1.memory_region[9].shared_cores = ["r5fss0-1"];
region1.memory_region[10].type = "CUSTOM";
region1.memory_region[10].$name = "MAILBOX_R5F";
region1.memory_region[10].auto = false;
region1.memory_region[10].manualStartAddress = 0x44000400;
region1.memory_region[10].size = 0x3CE;
region1.memory_region[10].isShared = true;
region1.memory_region[10].shared_cores = ["r5fss0-1"];
region1.memory_region[11].type = "FLASH";
region1.memory_region[11].$name = "FLASH_ESI_EEPROM";
region1.memory_region[11].attributes = ["I","R","W"];
region1.memory_region[11].auto = false;
region1.memory_region[11].size = 0x800;
region1.memory_region[11].manualStartAddress = 0x60181000;

section1.load_memory = "R5F_VECS";
section1.group = false;
section1.$name = "Vector Table";
section1.output_section.create(1);
section1.output_section[0].$name = ".vectors";
section1.output_section[0].palignment = true;

section2.load_memory = "OCRAM";
section2.$name = "Text Segments";
section2.output_section.create(5);
section2.output_section[0].$name = ".text.hwi";
section2.output_section[0].palignment = true;
section2.output_section[1].$name = ".text.cache";
section2.output_section[1].palignment = true;
section2.output_section[2].$name = ".text.mpu";
section2.output_section[2].palignment = true;
section2.output_section[3].$name = ".text.boot";
section2.output_section[3].palignment = true;
section2.output_section[4].$name = ".text:abort";
section2.output_section[4].palignment = true;

section3.load_memory = "OCRAM";
section3.$name = "Code and Read-Only Data";
section3.output_section.create(2);
section3.output_section[0].$name = ".text";
section3.output_section[0].palignment = true;
section3.output_section[1].$name = ".rodata";
section3.output_section[1].palignment = true;

section4.load_memory = "OCRAM";
section4.$name = "Data Segment";
section4.output_section.create(1);
section4.output_section[0].$name = ".data";
section4.output_section[0].palignment = true;

section5.load_memory = "OCRAM";
section5.$name = "Memory Segments";
section5.output_section.create(3);
section5.output_section[0].$name = ".bss";
section5.output_section[0].output_sections_start = "__BSS_START";
section5.output_section[0].output_sections_end = "__BSS_END";
section5.output_section[0].palignment = true;
section5.output_section[1].$name = ".sysmem";
section5.output_section[1].palignment = true;
section5.output_section[2].$name = ".stack";
section5.output_section[2].palignment = true;

section6.load_memory = "OCRAM";
section6.$name = "Stack Segments";
section6.output_section.create(5);
section6.output_section[0].$name = ".irqstack";
section6.output_section[0].output_sections_start = "__IRQ_STACK_START";
section6.output_section[0].output_sections_end = "__IRQ_STACK_END";
section6.output_section[0].input_section.create(1);
section6.output_section[0].input_section[0].$name = ". = . + __IRQ_STACK_SIZE;";
section6.output_section[1].$name = ".fiqstack";
section6.output_section[1].output_sections_start = "__FIQ_STACK_START";
section6.output_section[1].output_sections_end = "__FIQ_STACK_END";
section6.output_section[1].input_section.create(1);
section6.output_section[1].input_section[0].$name = ". = . + __FIQ_STACK_SIZE;";
section6.output_section[2].$name = ".svcstack";
section6.output_section[2].output_sections_start = "__SVC_STACK_START";
section6.output_section[2].output_sections_end = "__SVC_STACK_END";
section6.output_section[2].input_section.create(1);
section6.output_section[2].input_section[0].$name = ". = . + __SVC_STACK_SIZE;";
section6.output_section[3].$name = ".abortstack";
section6.output_section[3].output_sections_start = "__ABORT_STACK_START";
section6.output_section[3].output_sections_end = "__ABORT_STACK_END";
section6.output_section[3].input_section.create(1);
section6.output_section[3].input_section[0].$name = ". = . + __ABORT_STACK_SIZE;";
section6.output_section[4].$name = ".undefinedstack";
section6.output_section[4].output_sections_start = "__UNDEFINED_STACK_START";
section6.output_section[4].output_sections_end = "__UNDEFINED_STACK_END";
section6.output_section[4].input_section.create(1);
section6.output_section[4].input_section[0].$name = ". = . + __UNDEFINED_STACK_SIZE;";

section7.load_memory = "OCRAM";
section7.$name = "Initialization and Exception Handling";
section7.output_section.create(3);
section7.output_section[0].$name = ".ARM.exidx";
section7.output_section[0].palignment = true;
section7.output_section[1].$name = ".init_array";
section7.output_section[1].palignment = true;
section7.output_section[2].$name = ".fini_array";
section7.output_section[2].palignment = true;

section8.load_memory = "USER_SHM_MEM";
section8.type = "NOLOAD";
section8.$name = "User Shared Memory";
section8.group = false;
section8.output_section.create(1);
section8.output_section[0].$name = ".bss.user_shared_mem";
section8.output_section[0].alignment = 0;

section9.load_memory = "LOG_SHM_MEM";
section9.$name = "Log Shared Memory";
section9.group = false;
section9.type = "NOLOAD";
section9.output_section.create(1);
section9.output_section[0].$name = ".bss.log_shared_mem";
section9.output_section[0].alignment = 0;

section10.load_memory = "RTOS_NORTOS_IPC_SHM_MEM";
section10.type = "NOLOAD";
section10.$name = "IPC Shared Memory";
section10.group = false;
section10.output_section.create(1);
section10.output_section[0].$name = ".bss.ipc_vring_mem";
section10.output_section[0].alignment = 0;

section11.load_memory = "MAILBOX_HSM";
section11.type = "NOLOAD";
section11.$name = "SIPC HSM Queue Memory";
section11.group = false;
section11.output_section.create(1);
section11.output_section[0].$name = ".bss.sipc_hsm_queue_mem";
section11.output_section[0].alignment = 0;

section12.load_memory = "MAILBOX_R5F";
section12.$name = "SIPC R5F Queue Memory";
section12.group = false;
section12.type = "NOLOAD";
section12.output_section.create(1);
section12.output_section[0].$name = ".bss.sipc_secure_host_queue_mem";
section12.output_section[0].alignment = 0;

section13.$name = "ESI EEPROM over SPI Flash";
section13.type = "NOLOAD";
section13.load_memory = "FLASH_ESI_EEPROM";
section13.output_section.create(1);
section13.output_section[0].$name = ".esieeprom_flash";
section13.output_section[0].output_sections_start = "__esieeprom_start";
section13.output_section[0].output_sections_end = "__esieeprom_end";

int_xbar1.$name = "CONFIG_INT_XBAR0";
int_xbar1.xbarOutput = ["ADC2_INT1"];

int_xbar2.$name = "CONFIG_INT_XBAR1";
int_xbar2.xbarOutput = ["EPWM0_INT"];
int_xbar2.instance = "INT_XBAR_1";