• State Resolved
  • Replies 6 replies
  • Answers 1 answer
  • Subscribers 31 subscribers
  • Views 71 views
  • Users 0 members are here
Support feedback
Options
Options
Related

MSPM0G3507-Q1: How to achieve three PWMs with phase shift between each two

Crane Shao
Intellectual 970 points

Part Number: MSPM0G3507-Q1

Hello,

I found this post.

Theoretically it would work to use Timer G7 as the master and Timer A as slaves so that I can have TIMA0 and TIMA1 as two slave PWMs. 

From the example in the post, the master is switched from TIMA1 to TIMG7, it doesn't trigger the slave PAM even all the setting are checked correct as below:

For master:

for slave:

And if switching to use TIMA0 as the master, it also doesn't trigger the slave PWM at TIMA1 and TIMG7.

What might be missing in the configuration? 

Thanks!

Crane

  • 0
    TI__Mastermind 24867 points

    I think this will helps you a lot. Although, this demo use lots of timer to trigger lots of timer, makes entire trigger chain a little bit complex, but it is well tested.

    https://www.ti.com/lit/pdf/slaaeq8 2.1 PWM Implementation

    LSR_PWM_MSPM0G.zip

  • 0 in reply to Helic Chi
    Intellectual 970 points

    Thank you for your reply. Yes it works.

    The only question is that when the PWM frequency is 400K, the phase shifts caused by the CC1 and CC2 don't match the calculation value.

    For example, to achieve 120 degree phase shift, the duty cycle for TIMA0 CC1 is supposed to be 33%. Actually it is the duty cycle of 27% that causes a phase shift120 degree for TIMA0. And for 240 degree, the duty cycle of 54% instead of 66% causes a phase shift for TIMG6 of 240 degree.

    Is it normal because the frequency is very high or there might be something wrong here?

    Thanks!

    Crane 

  • 0 in reply to Crane Shao
    TI__Mastermind 24867 points

    Time gap between event: Timer pulisher transfer the trigger to Timer subscriber, takes some time.

    This time gap should be 200ns level, not a fix time, as you can see in my captured waveform, trigger need some time.

    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/908/LSR_5F00_PWM.sal

    This is captured by LSR_PWM_MSPM0G.zip this project.

    And your f = 400kHz, T = 2.5us. An trigger takes 200ns, which is about ~8% duty cycle.

    In your actual test result, 54%+8% ~= 66%

    I think this is the reason, you can try to use your Osc scope or other equipment try to catch the trigger delay.

  • 0 in reply to Helic Chi
    Intellectual 970 points

    Ok understand. It makes sense.

    One more thing to confirm. You said this time gap is not a fix time. Does it depend on anything reliably, related to the frequency or it is completely random? If it is random, what's its possible range?

    Thanks!

    Crane

  • 0 in reply to Crane Shao
    TI__Mastermind 24867 points
    Crane Shao said:
    Does it depend on anything reliably, related to the frequency or it is completely random?

    Depending on bus clock speed, and hardware trigger between different peripherals.

    Like Timer -> ADC, Timer -> PWM, these two trigger routine's trigger time is diference.

    Time of trigger need to test by yourself.

    Most easy test is PWM -> PWM, because only delay is trigger delay, directly measure the edge difference is OK.

  • 0 in reply to Helic Chi
    Intellectual 970 points

    Ok got it. Thank you for your help.

    Regards,

    Crane