MSPM0G1507: MCLK Switch and SYSOSC Sleep1 Behavior

Part Number: MSPM0G1507

Customer is trying to setup the device with the following configuration:

1. Start with MCLK=SYSOSC in 32MHz mode.
2. Transition MCLK to LFCLK (LFXT already started ~30 seconds earlier).
3. Set SYSOSC to 4MHz.
4. Goto Sleep 1 (with SYSOSC running at 4MHz).

Both the customer and myself have prototyped the impelemntation, using similar sequencing, but cannot get the desired result.

    DL_SYSCTL_switchMCLKfromSYSOSCtoLFCLK(false);
    DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_4M);
    __WFI();

When I run the above sequence, the result is the following problems:

1. The switch over from SYSOSC to LFCLK is taking ~700+ microseonds. That is way too long for the customer applicaiton, and I can't understand why it would need so much time. This is verified by GPIO toggle instrumentation.
2. The SYSOSC frequency is still 32MHz (verified by routing it to the CLKOUT pin).

I have tried various alternatives such as switching the SYSOSC to 4MHz before the MCLK switch over, and substituting DL_SYSCTL_switchMLKfromSYSOSCtoLFCKL() API for DL_SYSCTL_setPowerPolicyRUN1SLEEP1(). The result is always the same. If we look at where the bulk of the ~700 microseconds is being spent, it looks like it is being spent in the following loop:

while ((DL_SYSCTL_getClockStatus() & SYSCTL_CLKSTATUS_CURMCLKSEL_MASK) !=
           DL_SYSCTL_CLK_STATUS_MCLK_SOURCE_LFCLK) {
        ;
    }

Why does it take so long since the 32kHz crystal is already running (30 seconds prior)? Do we need to wait in this loop? What are the consequences if we don't wait in the loop?

Also, how to get the SYSOSC to be 4MHz after switching the MCLK away from it?

Thanks,

Stuart