AM2612: Routing GPIO interrupts to PRU core

Yes, you can eliminate the R5F intermediary entirely by using the PRU-ICSS XBAR to route the GPIO124 interrupt directly into the PRU-ICSS0 interrupt controller as a system event.

You can use this example as reference: EPWM Protection PRU Example - ICSS Connectivity

Architecture Overview

The AM261x PRU-ICSS0 has 16 external interrupt inputs (PRU_ICSSM0_INTR_IN_0 through PRU_ICSSM0_INTR_IN_14), each fed by a corresponding PRU-ICSS XBAR output (PRU-ICSS_XBAROUT_0 through PRU-ICSS_XBAROUT_14) 1. These external inputs map to specific system event numbers within the PRU-ICSS INTC.

Required Changes

Step 1: Reconfigure the XBAR Routing

Remove the current GPIO INT XBAR configuration that routes to GPIO_INT_XBAR_VIM_MODULE0_0 (which targets the R5F VIM).

Instead, configure the PRU-ICSS XBAR to route GPIO_MUX_124 to one of the PRU-ICSS XBAR outputs. For example, route it to PRU-ICSS_XBAROUT_0, which feeds PRU_ICSSM0_INTR_IN_0.

In SysConfig, look for the PRU-ICSS XBAR (not GPIO INT XBAR) and configure:

• XBAR Input: GPIO_MUX_124
• XBAR Output: PRU-ICSS_XBAROUT_0 (or any available output 0–14)

Step 2: Map the External Input to System Event 62 in PRU-ICSS INTC

The external input PRU_ICSSM0_INTR_IN_0 arrives at a specific system event number within the PRU-ICSS INTC. You need to verify which system event number corresponds to INTR_IN_0 in the TRM's PRU-ICSS internal event mapping table, then map it appropriately.

If the external input does not directly correspond to System Event 62, you have two options:

1. Remap your PRU firmware to respond to whichever system event INTR_IN_x maps to (instead of event 62)
2. Choose the XBAR output whose corresponding INTR_IN maps to system event 62

Step 3: Configure PRU-ICSS INTC

In your R5F initialization code, configure the INTC to map the system event to a channel and host interrupt that PRU1 monitors 1:

/* Example INTC configuration */
// 1. Map the system event (from INTR_IN) to a channel (e.g., channel 1)
// 2. Map channel 1 to Host Interrupt 1 (which connects to R31 bit 31 on PRU1)
// 3. Enable the system event
// 4. Enable the host interrupt
// 5. Enable global interrupts

PRUICSS_intcInit(gPruIcss0Handle, &pruicssIntcInitData);

The PRU-ICSS INTC programming model requires 1:

1. Set polarity/type (high/pulse)
2. Map event → channel via ICSS_INTC_CH_MAP_REGi
3. Map channel → host interrupt via ICSS_INTC_HINT_MAP_REG
4. Clear and enable the interrupt
5. Globally enable interrupts

Step 4: Remove R5F Interrupt Handler

Remove entirely:

• The HwiP_construct / HwiP_enableInt(164) code
• The irq164_handler function
• The GPIO bank interrupt enable/disable logic

Step 5: PRU1 Firmware

Your PRU1 firmware detects the interrupt via R31 register bits (bit 30 for Host Interrupt 0, bit 31 for Host Interrupt 1) 1. Ensure your PRU firmware polls or waits on the correct R31 bit corresponding to the host interrupt you mapped.

Summary Table

Important Note

Verify in the AM261x TRM (Table 10-19) 1 which internal system event number each INTR_IN_x maps to. If none directly maps to event 62, adjust your PRU firmware to use the actual event number assigned to your chosen INTR_IN_x input, or select the INTR_IN that corresponds to event 62.

1. AM261x Technical Reference Manual - PRU-ICSS INTC and Interrupt Map
2. MCU Plus SDK - PRUICSS Driver API Guide
3. EPWM Protection PRU Example - ICSS Connectivity