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AM2612: the reset cause register

Part Number: AM2612

Hi all,

In the AM261, we have the reset cause register which can show the reason of last reset.  If we choose ROM boot, we can read the different value from this register.  But we choose flash boot, we can only read 0X41 from this register, regardless of which way of reset. What maybe cause this phonomenon?

We suspend the SBL clear the register. The below picture is our SBL log:

image.png

Regard,

Jenney

  • Hi,

    Could you please confirm if you’re clearing the register at the start of boot in SBL before the reset to read the new reset cause?

    Regards,

    Sahana

  • Hi Sahana,

    i add some information: 

    1. I just use the SBL example in the SDK: mcu_plus_sdk_am261x_11_01_00_19\examples\drivers\boot\sbl_ospi_nand_multicore_elf

    2. This SBL seems disabled warmrst, right? Because i use the SW2 in the Launchpad, the board can't reset.

    3. I use the watchdog to warmrst the board. But the board cannot boot from flash. i need use the coldrst(like power on) which can boot board from flash. Is it normal?

    4. In the appliction after SBL, i try to read the reset cause. If i choose ROM boot, i can read the different value from this register.  But i choose flash boot, i can only read 0X41 from this register, regardless of which way of reset.  Also i tried to read it inthe SBL by the API. there also is no change. Maybe i found the wrong register. Could you tell me the address or name of the register(RESET CAUSE). 

    Regards,

    Jenney

  • Hi Jenney,

    This SBL seems disabled warmrst, right? Because i use the SW2 in the Launchpad, the board can't reset.

    Yes, this is disabled by default in hardware and wouldn't work unless this register isconfigured:

    I use the watchdog to warmrst the board. But the board cannot boot from flash. i need use the coldrst(like power on) which can boot board from flash. Is it normal?

    No, this is not expected. Any warm reset should also reset the flash (as shown in the below Rev. A schematic) and should be able to boot from flash. Could you please confirm the revision of AM261-LP board you're using? 

  • In the appliction after SBL, i try to read the reset cause. If i choose ROM boot, i can read the different value from this register.  But i choose flash boot, i can only read 0X41 from this register, regardless of which way of reset.  Also i tried to read it inthe SBL by the API. there also is no change. Maybe i found the wrong register. Could you tell me the address or name of the register(RESET CAUSE). 

    This is the register that shows the reset cause:

     

    The default value of this register is 0x41, so it would continue to show this unless it's cleared by writing 0x7 to the CLR register:

    Regards,

    Sahana

  • Hi Sahana,

    I tested the reset register method you mentioned. Regardless of which reset method is used, the value read always comes back as 0x00000041.
    Are there any timing requirements for reading the reset register? Is it possible that the value is being overwritten during initialization?
    Regards,
    Jenney
  • Hi Jenney,

    What is the expected reset cause you’re looking for?

    You’ll need to read the reset cause register at the beginning of the SBL and then clear the reset cause register (to read the next reset correctly) before proceeding with the secondary boot loader functions and the application. Are you doing this? 

    It is not expected for this register to be overwritten if you’re explicitly clearing it in your SBL.

    Regards,

    Sahana

  • Hi Sahana,

    Customer reset the device by watchdog, reset button and software warm reset. This register keep 0x00000041.

    You mean we need read the reset register at the beginning of the SBL. If we don't read the reset register at the beginning of the SBL, what will be read in the APP? It will keep 0x00000041, right?

    Regards,

    Jenney

  • Hi Jenney,

    Have you ensured to clear the register and confirmed that it reads 0x0 in the WARM_RST_CAUSE register before resetting the device? You can read it in the SBL or the APP, but it is important to clear the register after a POR to not read it's default value of 0x41.

    Regards,

    Sahana

  • Hi Sahana,

    Ok, i will let customer try it again.

    Customer found:  when using EVM debugging, code run for many time. Suddenly the device has been reset. The project has no configuration about watchdog and HSM. 

    what reason perhaps does it due to?

    Regards,

    Jenney

  • Jenny,

    Is the reset happening in OSPI Boot mode? Has the customer programmed the HSM RT firmware through the SBL? There is 180sec timeout check from ROM, i.e. HSMRT should be up within 180sec, else HSM will reset the watchdog.

    Regards,

    Sahana

  • Hi ,

    The revision of AM261-LP board as below:

    customer used the watchdog to warmrst the board which boot by flash mode. But the board cannot boot from flash. customer need use the coldrst(like power on) which can boot board from flash. 

    Also customer found the OSPI0_RESET_OUT0 keep low. Customer force this pin high, everything is ok.

  • Hi Sahana,

    Is the reset happening in OSPI Boot mode? Has the customer programmed the HSM RT firmware through the SBL? There is 180sec timeout check from ROM, i.e. HSMRT should be up within 180sec, else HSM will reset the watchdog.

    No, customer use the uart mode. They didn't program any HSM firmware. Sometimes it will reset after few minutes, sometimes it happened in 10~20 seconds.

    Regards,

    Jenney

  • What is the intention for using UART bootmode?

    General practise is to use DEVBOOT/ NO-BOOT mode for debugging via CCS with code placed in RAM, or OSPI Bootmode for accessing code programmed into Flash and then executing it.

  • Jenney,

    The revision of AM261-LP board as below:

    customer used the watchdog to warmrst the board which boot by flash mode. But the board cannot boot from flash. customer need use the coldrst(like power on) which can boot board from flash. 

    Please create a separate E2E for separate issues for better tracking and support.

  • Hi Sahana,

    No matter which bootmode, customer always occurred the reset issue. Even flashing our empty example into the evm, the reset issue still happens. I think maybe it is hardware configuration or hardware issue. The reset cause register is HSM_WDT.

    Regards,

    Jenney

  • Hi Jenney,

    I'm assigning this ticket to another expert for further debug. I think a call would be good to narrow done the issue more quickly.

  • Lets close it in a debug call.

    I am suspecting the reste might be coming from PMIC