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AM263X-MCAL-SDK: RX BUFFERS

Part Number: AM263X-MCAL-SDK
Other Parts Discussed in Thread: AM2634

Hi AJ Favela,
 

I am trying to use dedicated RX Buffers instead of RX FIFOs on the AM2634 MCAN. However, MCAN_MsgRAMConfigParams only exposes rxFIFO0Cnt and rxFIFO1Cnt, and I don't see any parameter for RX Buffer allocation. Could you please explain how RX Buffers are configured in the MCU+ SDK and how to route accepted messages to them using the standard ID filters?

  • Hi Harika,

    Unlike TX Buffers (which have an explicit txBufCnt parameter), dedicated RX Buffers are implicitly allocated in the MCU+ SDK. The MCAN_MsgRAMConfigParams structure exposes only two RX Buffer-related fields 1:

    • rxBufStartAddr — Start address of the RX Buffer section in Message RAM
    • rxBufElemSize — Element size for RX Buffer entries

    You don't specify a count. Instead, you reference buffer indices (0–63) directly in your filter configuration, and the hardware supports up to 64 dedicated RX Buffers 2.

    How to Route Messages to RX Buffers via Standard ID Filters

    Configure each standard ID filter element as follows 1:

    /* sfid1 defines the exact standard ID to match */
    stdFiltElem->sfid1 = APP_MCAN_STD_ID;
    
    /* sfid2 specifies the target RX Buffer number (0–63) */
    stdFiltElem->sfid2 = bufNum;
    
    /* Route matching messages to dedicated RX Buffer */
    stdFiltElem->sfec = MCAN_STD_FILT_ELEM_BUFFER;
    
    /* sft is IGNORED when sfec = MCAN_STD_FILT_ELEM_BUFFER */
    stdFiltElem->sft = MCAN_STD_FILT_TYPE_RANGE;


    Reading from the RX Buffer

    After receiving, check the New Data status and read:

    MCAN_getNewDataStatus(gMcanBaseAddr, &newDataStatus);
    MCAN_clearNewDataStatus(gMcanBaseAddr, &newDataStatus);
    
    bitPos = (1U << bufNum);
    if (bitPos == (newDataStatus.statusLow & bitPos))
    {
        MCAN_readMsgRam(gMcanBaseAddr, MCAN_MEM_TYPE_BUF, bufNum, fifoNum, &rxMsg);
    }

    Use interrupt source MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG to detect when a message arrives in any dedicated RX Buffer 1.

    Critical Limitation: No Range/Mask Filtering for RX Buffers

    Per the TRM, when SFEC is set to "Store in Rx Buffer" (7h), the filter type (SFT) field is ignored 2. This means:

    • Range filters (MCAN_STD_FILT_TYPE_RANGE) do not work with RX Buffers
    • Classic bit-mask filters do not work with RX Buffers
    • Only exact ID matching is supported — one filter element per ID per buffer

    If you need to accept a range of IDs, you must use RX FIFO 0 or FIFO 1 instead 3.

    Summary of Message RAM Setup

    Call MCAN_calcMsgRamParamsStartAddr() after configuring your parameters — it will compute rxBufStartAddr automatically based on the other sections' sizes 1:

    MCAN_initMsgRamConfigParams(msgRAMConfigParams);
    msgRAMConfigParams->lss = APP_MCAN_STD_ID_FILTER_CNT;
    msgRAMConfigParams->txBufCnt = APP_MCAN_TX_BUFF_CNT;
    /* rxBufStartAddr and rxBufElemSize are set; no count needed */
    MCAN_calcMsgRamParamsStartAddr(msgRAMConfigParams);

    Follow up: How many distinct standard IDs do you need to receive into dedicated RX Buffers — are you mapping one ID per buffer, or do you need to accept a broader range of IDs (which would require switching to RX FIFO mode)?


    1. MCU+ SDK MCAN LLD API Guide & MsgRAMConfigParams
    2. AM263x Technical Reference Manual — MCAN Dedicated Rx Buffers & Filter Elements
    3. E2E: AM263x MCAN — How to configure to receive any standard ID in message RAM buffer

    Best Regards,

    Zackary Fleenor