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AM2434: Alignment issues on ENET DMA

Davide Marzona
Prodigy 55 points

Part Number: AM2434

Hello,

we thought that there is an issue in the SDK. We are using an AM2434 with one core that uses ICSSG peripherals. We are using SDK version 11. During our development we moved some parts of the code and during the initialization we got the following assert and the program blocked in this part of code:
image.png
image.png
To better investigate why the dmaDesc was null, we added a breakpoint at line 2047 to understand what the function was doing. At the next run we entered the function and discovered that the dmaDesc was null due to a alignment issue:
image.png
By looking at the pointer, we got the information that the descriptor is gDmaDescMemInfoArray defined in a sysconfig-generated file. We looked for its definition in the project and from what we got, assertion is correct since this array should be aligned at 32 or 64 bits, but not at 128
image.png
image.pngTill now, our code worked fine, but I think it was just a matter of "luck" on how compiler and linker put the variables in the memory. By correcting the alignment definition in the SDK, we were able to let the code work again.
I'm writing this to understand if we are missing something or if this is a real bug of the SDK

Regards,
D. Marzona

  • 0
    TI__Genius 10900 points

    Hi Davide,

    I have checked the configuration, and the issue seems to be the cache alignment issue as you mentioned, but instead with a different element than you were pointing out. The gDmaDescMemArray is the one which interacts with the UDMA driver, and it has UDMA cache alignment requirement from the DMA driver. I am checking for the HW guidelines to confirm it. 

    This is an error in ICSS template files, and the fix is to update the alignment from ENETDMA_CACHELINE_ALIGNMENT to UDMA_CACHELINE_ALIGNMENT. 

    Can you please confirm if you only updated the cacheline alignment of only the gDmaDescMemInfoArray? Or are you changing the alignment of gDmaDescMemArray as well? I have tested the situation where the alignment is not correctly aligned, but I don't observe any issues with gDmaDescMemInfoArray with current configuration. 

    Thanks and regards,
    Teja.

  • 0 in reply to Teja Rowthu
    Prodigy 55 points

    Hello Teja,

    we modified the definition of ENETDMA_CACHELINE_ALIGNMENT to let the code work. If you think that change the alignment definition on those two array definitions is a more reliable solution, we will try to do so. Let me know.

    Regards,

    D. Marzona

  • 0 in reply to Davide Marzona
    TI__Genius 10900 points

    Hi Davide,

    Yes, Updating the alignment definition specifically for those two arrays would be a better solution than to update the ENETDMA_CACHELINE_ALIGNMENT, since this macro is also used to verify SW defined module memory alignment. So, it is preferable to keep it at 32, or updating it to 64 (This has been done as an update in later versions of MCU+ SDK)

    If you want to specifically update the ENETDMA_CACHELINE_ALIGNMENT macro, I would need to check the dependencies, and I will get back to you in 2 days. If you want to test by updating the alignment for those two arrays to UDMA_CACHELINE_ALIGNMENT, then you can go ahead and test with that change.

    Please let me know regarding your preference for updating ENETDMA_CACHELINE_ALIGNMENT, so that I can plan my schedule accordingly.

    Thanks and regards,
    Teja.