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Very basic doubt about TMS570 error recovery.

Luis Filipe Rossi
Expert 1035 points

Hi, I am studying about TMS570 architecture and a very basic doubt comes to my mind. Which are the most common recovery procedures if both processors process a different instruction? Or that is totally application dependent? Any good source code with an example?

Thank you very much!

  • 0
    TI__Mastermind 23000 points

    Hello,

    The primary design of the lockstep CPU solution is targeting detection of error with safe shutdown.  When a lockstep compare error is detected, an ESM group 2 error will be generated.  This will generate a non-maskable interrupt to the CPU as well as an error pin response which can be used by an external observer.  

    In terms of recovery, you have a few options:

    • When the CPU takes the NMI handler, it is possible for the CPU to initiate the LBIST self test controller.  If the LBIST passes, the lockstep compare fault was likely transient and safe restart is possible.  Upon exit of the LBIST, the CPUs are in a reset state and will re-start execution.
    • When the CPU takes the NMI handler, it is possible for the CPU to generate an on-chip warm reset to restart execution for the entire device.
    • The external observer can initiate either a  warm reset (nRST), cold reset (nPORRST), hold the device in reset (hold nPORRST), or cut power to the device power supply.
    • External observer action can be called off by CPU clearing the nERROR within the defined nERROR pulse time.  This allows CPU recovery without need for the external observer action.
    Regards,
    Karl