Part Number: AM625
Other Parts Discussed in Thread: SYSCONFIG
We are encountering unsatisfactory signal slew rates with relatively slow waveform slopes across multiple interfaces. The specific issues are as follows:
- RGMII1 signals: The required slew rate is 2.64–5 V/ns, but the actual measured value is only 0.9 V/ns.
- SPI0 signals: The specified slew rate range is 2–8.5 V/ns, while the actual measurement is around 0.6 V/ns.
- MCU_OSC0_XI: The rise time and fall time are required to be no more than 4 ns, but the measured values reach 6–7 ns.
- RS232 serial port: The input slew rate requirement is 0.5–5 V/ns (equivalent to 0.66 ns–6.6 ns transition time), while the measured rise time is 16–18 ns.
- CAN interface receive signals: The required slew rate is 2–15 V/ns, and the actual measured value is approximately 1 V/ns.
We would like to confirm whether modifying the drive strength (DRV_STR) can improve the above slew rate issues, and whether adjusting drive strength is the correct approach for these problems.
According to the datasheet, drive strength is configured via the DRV_STR register. However, I only found the default state described in the AM625 datasheet, with no detailed configuration options.
I saw on technical forums that a setting value of "2" corresponds to fast mode. I am not sure whether this feature is supported by the chip revision and SDK version we are using.
If the drive strength modification is feasible:
- Is it sufficient to only modify the corresponding DRV_STR configurations for the RGMII, SPI0, CAN and UART0 interfaces?
- By what method should the MCU_OSC0_XI signal be adjusted?
