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AM2632: On-chip ADC Sample and Hold Time, Equivalent Resistance and Component Value Guidance

Chris Yorkey
Genius 16400 points

Part Number: AM2632

TI TEAM,

Could you please confirm if the internal scale down 32/18 x VREFHI is down via resistor divider or SW?

From link below, it's described there's an internal resistive divider ahead of the SH core. If so, will this have an effect on the SH time?

From Academic AM26X Analog-to-Digital Converter (ADC), I can't find if there's a physical resistance or just 

My goal is to identify the time constant for Chold when SH switch is closed.

I will presume equivalent circuit will be something like this if scale down is done via resistor divider:

Also, Would you please confirm if the values for Ron and Chold are equal to 1.2k and 8p respectively?

TY in advance for any additional guidance or input you can recommend.

TY,
CY

  • 0
    TI__Prodigy 440 points

    Hi CY,


    On Ron and Chold: yes, those values are consistent with the simplified ADC front-end model our ADC design team shared for AM263x (same ADC on AM2632):


    Ron = 1.2 kOhm (S/H switch resistance)
    Chold = 8 pF (S/H capacitance)
    Cp = 7 pF (pin parasitic capacitance)


    Reference: https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1122245/am2634-q1-adc-input-capacitance.  Note these are model values for settling estimates, not datasheet-guaranteed parameters.
    Settling time constant: with source resistance Rs and any external capacitance Cs at the pin:
    tau ≈ (Rs + Ron) x Ch + Rs x (Cs + Cp)


    For a low-impedance source (Rs ≈ 0), tau ≈ 1.2 kOhm x 8 pF ≈ 9.6 ns. Settling to within 1/2 LSB at 12 bits takes roughly 9 to 10 tau, so about 100 ns, plus margin. Then set the acquisition window (ACQPS) to cover that. TRM section "Choosing an Acquisition Window Duration" walks through the same calculation.


    On the 32/18 scaling: it is internal to the ADC, not done in SW.  The model above is what the design team provided for settling analysis. 

    Regards, 

    K.B

  • 0 in reply to Kudra Baruti
    TI__Genius 16400 points

    K.B., thanks for your quick reply.

    We have two ideas:

     

    1. If the scaling down is done via HW then then the SH time will depend on internal ADC scaling (via Resistor) and Ron & Chold when Switch closed, and ADCIN must be isolated from the internal scale down to prevent a loading effect to external voltage divider.

     

     

     

    1. Or if scaling down is done via SW then the S+H timing will depend purely on Ron and Chold. Since Cs =10nF and assuming Ch=12pF,  then Cs is much higher than Ch, making Cs to behave almost like a voltage source when SW closed.

    Your additional comments are welcomed!

    TY,
    CY 

  • +1 in reply to Chris Yorkey
    TI__Prodigy 440 points

    Thanks, a few comments on the two scenarios.

    1. Scaling mechanism

    The 32/18 scaling cannot be done purely in software. A 1.8 V-referenced core cannot digitize a 3.2 V input without analog attenuation somewhere. So the real question is whether the attenuation is:

    • resistive at the pin (continuous DC load, your scenario 1), or
    • capacitive/switched inside the S/H (no DC load, only sampling charge).
    • I am confirming this with the ADC design team. In the meantime, a quick bench check will tell you which one you have: drive a DC voltage through a large series resistor (e.g. 100 kOhm) and measure the pin voltage with the ADC idle versus converting slowly. A resistive divider in the ~30 kOhm range would pull the pin down by a large fraction even when idle. A switched-capacitor front end shows only a small, sample-rate-dependent drop.
    1. Values to use
      Use the design-team model rather than Ch = 12 pF: Ron = 1.2 kOhm, Ch = 8 pF, plus Cp = 7 pF at the pin.
      Reference: AM2634-Q1: ADC Input Capacitance 

    KB

  • 0 in reply to Kudra Baruti
    TI__Genius 16400 points

    OK thank you again KB and I believe by tomorrow we can close this out as ANSWERED.  

    Regards,

    Chris