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Flash ECC - details needed

Vaclav Cechticky
Intellectual 560 points 
Hello,

I'd like to ask a few details about the Flash ECC realization.

A part of the Application Report SPNA106A is code implementing 
the intialization steps of Hercules MCU. Thank you very muc for this
application report and code, I find it really great.

One of the initialization steps is checkFlashECC, which is checking
ECC logic inside CPU. This function is setting flash registers 
that are not desribed in SPNU499. For example, the registers:
- FDIAGCTRL
- FPAROVR
- FEDACSTATUS

Could you please reference me to a document containing the appropriate 
technical description?

To be frank, I'd like to better understand the role of Flash Mirrored Image.
I found just on the page 69 of SPNS177 that the "Flash memory is mirrored to
support the ECC logic".

Could you please provide me more information how the ECC logic is 
implemented for Hercules MCU?

Thank you
Vaclav
  • 0
    TI__Mastermind 23000 points

    Hello Vaclav,

    As you note, some of the safety related registers in the flash wrapper are not documented in the current TRM.  This should be fixed in the next TRM update.  The registers noted are primarily used for management of additional test modes/diagnostics in the flash wrapper which are not central to the CPU's ECC logic.

    The ECC logic is implemented in the ARM Cortex R4F CPU and is documented by ARM in the Cortex R4F TRM.  A copied can be downloaded from ARM using this link.  http://infocenter.arm.com/help/topic/com.arm.doc.ddi0363e/DDI0363E_cortexr4_r1p3_trm.pdf.  The ECC logic is described starting in section 8.2.2.

    Regarding mirroring, this has to do with where the memory is visible in the memory map.  The 570 duplicates the flash memory in the memory map in two locations - one which resolves to direct TCM access and one which will allow indirect access via the AXI master port --> AXI slave port --> TCM, similar to how DMA accesses TCM.  This is a little trick which is used to support some of the test modes built into the flash wrapper, as the wrapper will identify the mirrored access as coming through the AXI slave port.  This should be clarified with the next TRM update.

    Regards,

    Karl

  • 0 in reply to KGreb
    Intellectual 560 points

    Hello Karl,

    Thank you for your prompt reply. I think, I've got it.

    Regards

     Vaclav