Verification of PLL Fail Configuration

Vaclav Cechticky

Intellectual 560 points

Hello,

I'd like to verify the mechanism of "Reset on PLL Slip" and "Reset on Oscilator Fail" in PLL. How can I do it?

Thank you

Regards

Vaclav

over 14 years ago

0 Haixiao Weng over 14 years ago

TI__Genius 13810 points

An simple example: short the oscillator input pin to ground through a 10khom resistor. Usually, it generates both the oscillator fail and pll-slip failure. Of cause, it will cause your system failure too.

Haixiao

0 Vaclav Cechticky over 14 years ago in reply to Haixiao Weng

Intellectual 560 points

Hello Haixiao,

Thank you the example. This is fine, I can apply it on my desk. However, I'd prefer to run the test also in a field, where I'm not able to apply such hardware solution.

Isn't there a software solution for it? It would fit much better for my use case.

Thank you

Regards

Vaclav

0 Vaclav Cechticky over 14 years ago in reply to Haixiao Weng

Intellectual 560 points

Hello Haixiao

My HDK was equipped by the solution you proposed. I'm really able to achieve a system reset, as expected. I also should add that not always the system reset occurs ... the added circuit seems to be fine ...

Anyway, when it occurs I can verify that the reason is a oscillator failure (systemREG1->SYSESR & 0x4000), I don't handle the situation immediately, but I do continue with the start-up, till "systemInit()", where the configuration of PLL1 (systemREG1->PLLCTL1) fails, it comes again the system reset. I'm interested to know why this happens, is in this case the PLL1 configuration protected against writing?

Thank you

Regards

Vaclav

0 Haixiao Weng over 14 years ago in reply to Vaclav Cechticky

TI__Genius 13810 points

Sounds like in PLL configaration. You configured it as: reset if oscillator fails.

Regards,

Haixiao

0 Vaclav Cechticky over 14 years ago in reply to Haixiao Weng

Intellectual 560 points

Dear Haixiao,

Yes, I did, it's the objective of the test.

Regards

Vaclav

0 KGreb over 14 years ago in reply to Vaclav Cechticky

TI__Mastermind 23000 points

Hello Vaclav,

I suspect that the reason you see a system fault at PLL setup is that the oscillator is non-functional. While you can operate from the on-board LPO as a back-up measure, the LPO is not a valid clock source for the PLL. As such the PLL is failing due to lack of an input clock.

Regards,

Karl

0 Chuck Davenport over 14 years ago in reply to KGreb

TI__Guru 59540 points

Given the time since the last post to this thread, it is assumed that the suggested answer and subsequent discussion resolved the problem. This thread will be closed at this time. If there continues to be an issue or further questions, please open a new thread.

Arm-based microcontrollers

Arm-based microcontrollers forum

Verification of PLL Fail Configuration