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TCRAM Address Bus Parity Checking

Nathaniel Schlossberg
Prodigy 140 points

Hello,

For the TMS570LS, the TCRAM wrappers provide 3 safety checks.  One is SECDED, which has been covered already in this forum.  One is redundant address decoding, which has a built-in software-triggered hardware test.  The third safety check is Address Bus Parity Checking.  However, I don't see a method in the TRM to actually check that the address bus parity check works.  Is there a way I can flip the address bus parity bit to induce an error?

Thanks

  • 0
    TI__Mastermind 23000 points

    Hello,

    Unfortunately ARM did not build a fault insertion capability into this feature in the CPU.  The parity generation in CPU is also checked by the LBIST STC and lockstep, so this can provide some assurance of proper operation.

    Regards,

    Karl