Hello Forum,
I've the intention to connect two TMS570 CPUs by the RTP/DMM interface using the following scheme:
.---------------.
| |
| TMS570LS3137 |
| | f: ~50 MBit/sec
| RTP DMM | Data Width: 4 bit
'--+-+----------'
| | +^+
| | | |
| | | |
| | | |
+ + | |
V | |
.----------+-+--.
| DMM RTP |
| |
| TMS570LS3137 |
| |
'---------------'
There I've following several questions that the TRM couldn't answer to me satisfying:
primary: Is this connection possible/worthwhile ?
a) Is the transfer by RTP ECC-protected (64Bit+8ECC Data Transfer?)/ is it FIFO dependet? (BTCM vs Peripheral Write)
b) Could a write to a opposite peripheral HW Resource (EMAC/MDIO) seen as "virtual local" write access ?
c) How much Data Bytes are Transfered by a sub-64bit write to the internal BTCM bus?
d) If I use the HW-Handshaking (RTPENA-) and the "Halt on Overflow"-Function so is there also the CPU haltet until the FIFO is emptied?
e) What is the Size of the FIFOs?
regards,
Lorenz