What is the function of ATCMECEN Bit in C1, Auxiliary Control Register

Hello Pashan,

The bit ATCMECEN in c1 register is 'ATCM External Error Enable' . It controls the external error notification from memory on ATCM interface to the CPU.

When disabled, the CPU will not receive the error such as bus error if happened on the ATCM interface.

You may also refer to the ARM Cortex-R4 TRM.

Best regards,

Diwakar

Hello Diwakar,

When ATCMECEN is disabled and there is a ECC Error on ATCM Port Interface [Flash Device in TMS570LS3137], then there won't be any update within CPU related to DFSR Register [Data Fault Status Register].

Is the correct?

Thank you.

Regards

Pashan

Pashan,

No. The ECC calculation is within the CPU.

This is to enable the external error. Eg. a bus error due to invalid address.

Regards,

Diwakar

Hello Diwakar,

What is the Power On Reset value of the following BITS of ACTLR Register for TMS570LS3137:

ATCMECEN  --  B0TCMECEN  -- B1TCMECEN

Also in which document it is mentioned for Power On Reset Value.

I couldn't find it in ARM Cortex TRM.

Thank you.

Regards

Pashan