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NHET functionality different with debug probe attached vs removed

Hi,

I have some NHET code that has been developed while using the Green Hills SW debugger.  I have the CortexR4 code programmed in flash and the system starts up and runs as long as the debug probe is attached.  Once the probe is removed, the CortexR4 continues to run normally, but the NHET does not continue to function normally, but it does look like it's still running.  I have verified that at least one PWCNT instruction continues to run as expected with the debug probe removed, but there is an ECNT instruction that seems to not be responding to an edge trigger as normal.  The way the edge trigger is with these instructions:

PULSE_SYNC_RB   ECNT { next=LINEFAULT_PULSE,cond_addr=LINEFAULT_TRIGGER,pin=11,event=FALL,reg=NONE,irq=OFF,data=0}

LINEFAULT_TRIGGER MOV32 { remote=LINEFAULT_PULSE,type=IMTOREG&REM,reg=NONE,data=0}

LINEFAULT_PULSE PWCNT { en_pin_action=ON,pin=1,hr_lr=LOW,action=PULSELO,data=0}

So it can be seen that the PULSE_SYNC_RB instruction will normally transfer execution past the LINEFAULT_TRIGGER instruction to the LINEFAULT_PULSE instruction.  However, when the edge trigger is received on pin 11, the LINEFAULT_TRIGGER instruction is executed and will copy its data field to the LINEFAULT_PULSE instruction in order to start an output pulse on pin 1.  The LINEFAULT_TRIGGER data field is programmed by system software at run time.

This all seems to work fine with the debug probe attached, but when disconnected, the PULSE_SYNC_RB edge is still present on pin 11, but the LINEFAULT_PULSE stops outputting on pin 1.  There does seem to be some correlation between the nTRST line and the LINEFAULT_PULSE on pin 1.  I have captured on a logic analyzer that the LINEFAULT_PULSE normally begins 2us after the PULSE_SYNC_RB edge, which would correspond with my 1MHz NHET execution rate.  In my capture, as the debug probe is removed, the nTRST line is pulled down to ground (it is high while the probe is connected), and about 1.9us later I get a LINEFAULT_PULSE on pin 1.  After that, no more LINEFAULT_PULSE transitions occur until the probe is reattached, some toggling of nTRST occurs and another falling edge of nTRST happens, which causes another LINEFAULT_PULSE 1.97us later.  After that, it seems that some communications happens on the debug bus and then LINEFAULT_PULSE begins to act normally again.

After reading a bit about the nTRST role in NHET debugging, I understand there can be some interaction, but it seems that none of it should matter since I don't have any debug bits set in my HET code.  The documentation indicates that nTRST = 0 means "Functional mode" and nTRST = 1 means "Test/Debug mode".  My NHET code is only working in "Test/Debug mode" it seems.  Can someone clue me in on what I'm missing here?

Thanks,

Marco

  • Hello Marco,

    There have been some reported issues with the pull up on nTRST that prevent the device from opperating properly. The issue is specific to the revision of of the device on the HDK board that is currently being shipped. The recommendation is to remove the 10K pull up resistor from the board. This resistor is located on the back side of the board and labeled as R310.

    The schematic for the HDK board is located in the 570 Wiki page at the following location:

    http://processors.wiki.ti.com/images/1/17/TMS570LS31x_HDK_Schematics.pdf

    If this resolves your issue, please indicate by verifying the answer.

    Thank you,

    Chuck Davenport

  • Can you check if HET11 is configurated as input, pull disabled, and pull select as 'pull down'? If this is the case, then we can explain why it works in debug mode and not in standalone mode.

    Regards,

    Haixiao

  • Haixiao,

    Yes, it looks that way.  Bit 11 in the HETDIR register is 0, in HETPULDIS it is 1, in HETPSL it is 0.  How is the debug vs standalone behavior explained?

    Thanks,

    Marco

  • Marco:

    I believe this is your issue. When the combination of DIR, PULDIS and PSL are set in this way, the input buffer is disabled. See the table below that shows the behaviors for different combinations of these settings.

    The reason why this works during debug mode is that all inputs are enabled and cannot be disabled during debug mode regardless of the settings within these registers. To fix you problem, I would suggest setting the HETPSL = 1 which will allow the input buffer to always be enabled but will not impact the actual pull since it is disabled through the HETPULDIS setting.

    Please let me know if this resolves your issue by verifying this answer.

    Regards,

    Chuck Davenport

  • Marco,

    My apologies, but the table did not post for some reason. Please reference table 19-9 in the TRM (SPNU499.PDF).

    Regards,
    Chuck D.