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Deep Sleep UART power

Ben H.
Intellectual 405 points

Hello,

I'm trying to achieve minimal power consumption in Deep Sleep Mode, while still being able to wake up from it via a UART interrupt.

I currently have it working by setting the UART clock source as the 16MHz Precision Internal Oscillator.  Is there any way I can reduce the power further by dividing down the clock or using the 30kHz internal clock, or is this as good as it gets?

I'm using the LM3S9B92 and LM4F232.

Thanks.

  • 0
    TI__Expert 6140 points

    Ben,

    For LM4F232:

    You can further reduce the power consumption by either dividing the PIOSC or by using the IOSC30KHZ, but you have to be careful. If your system is in run mode clocking at a frequency of 16 MHz and if the baud rate for your UART was set using a 16 MHz clock, then your baud rate will change when entering deep sleep mode at a different frequency. This occurs because the baud rate register's values are not recalculated, but the source clock frequency is changed. For instance, consider the case in which you are running at 16 MHz with a baud rate of 9600. If you enter deep sleep and set the frequency to 8 MHz, now your new baud rate is 4800. This means that if you ignore the fact that the baud rate was changed, the data received during deep sleep will be incorrect. This is also true if your system is running from any clock source other than the IOSC30KHZ and you enter deep sleep using IOSC30KHZ. In addition, IOSC30KHZ has a drift of ± 50% which will directly affect your baud rate and thus your data integrity. Therefore, if you want to wake up from the UART interrupt, I do not recommend using the IOSC30KHZ.

    With the right baud rate considerations, you can divide the PIOSC by up to  64 to reduce the overall power consumption in deep sleep mode. From the LM4F232H5QD datasheet:  

    "The SYSDIV2 field in the RCC2 register is 2 bits wider than the SYSDIV field in the RCC register
    so that additional larger divisors up to /64 are possible, allowing a lower system clock frequency for
    improved Deep Sleep power consumption"

    One way to maintain your baud rate constant when entering deep sleep mode is to source your UART from the PIOSC in run mode before calculating the baud rate. Note that, If the PIOSC is used for the UART baud clock, the system clock frequency must be at least 9 MHz in Run mode. So the slowest frequency that will not affect your baud rate is 9 MHz.  

    IOSC30KHZ will give you the best power numbers during deep sleep (but I do not recommend given the described baud rate effects). From the LM4F232H5QD datasheet:

    "The internal 30-kHz oscillator provides an operational frequency of
    30 kHz ± 50%. It is intended for use during Deep-Sleep power-saving modes. This power-savings
    mode benefits from reduced internal switching and also allows the MOSC to be powered down." 

    Using the 30-KHz oscillator with all the peripherls off in deep sleep, the nomical current consumption is 1.05mA (page 1439 of  LM4F232H5QD datasheet).

    For LM3S9B92:

    Deep sleep must not be used as per the device's errata (page 7):

    http://www.ti.com/litv/pdf/spmz640a 

    Regards,

    Damian