Hi,
I want to write on register REQMASKCLR0 but nothing happen. What mode (priviliged mode) I have to use and how can I program this mode?
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Hi,
I want to write on register REQMASKCLR0 but nothing happen. What mode (priviliged mode) I have to use and how can I program this mode?
Friedrich,
Thanks for using our forum.
The VIM REQMASKCLR0 is writable only in privilege.
All CPU modes have privilege but USER mode.
Usually your application is running in USER mode, and this mechanism is in place to avoid your user code to change critical configuration.
Once the CPU is in user mode, one option to gain privilege is to execute a SWI instruction (Software Interrupt)
By executing a SWI, the CPU will jump in the SWI handler and will switch to SYSTEM mode.
SYSTEM mode shares the same set of CPU Registers as USER mode, and has privilege attribute.
The REQMASKCLR0 can be write accessed in this mode.
I can post an example of SWI handler if you need.
Regards,
Jean-Marc
Jean-Marc,
Thanks for your answer and if you can post an example of SWI handler it will be helpfully for me.
Kind regards,
Friedrich
Friedrich,
Here is a CCS project to demonstrate the usage of SWI. 8304.SWI.zip
In this code, the main code is executed in USER mode.
A first attempt to write to the REQMASKSET0 register fails, the second time, it is done using a SWI handler.
Our Code Generator Tools offers a way to define a function as a SWI handler using a specific PRAGMA.
#pragma INTERRUPR(ISR_SWI,SWI)
What that means, the function ISR_SWI will not be a regular function, but as SWI exception.
If you look at the swi.h file you will see that aliases are defined to call this ISR_SWI with different parameters.
Let's have a look at the following definition:
#pragma SWI_ALIAS(WRITE_SVC,0)
#pragma SWI_ALIAS(INT_FIQ_ENABLE,1)
void WRITE_SVC(unsigned int address, unsigned int data);
void INT_ENABLE();
main()
{
WRITE_SVC((unsigned int)(&vimREG->REQMASKSET0,0x00000004);
INT_ENABLE();
}
The WRITE_SVC function call will be compiled into a swi instruction. (assembly opcode)
This instruction has a 24build in argument field. (bit 0 to bit 23 of the instruction itself) This field will be 0 for the WRITE_SVC.
Same for the INT_ENABLE function call. This will be translated to a swi instruction with the argument field equal to 1.
The SWI handler (ISR_SWI) retrieves from the swi instruction the 24bit field "argument".
Based on the value a swich case will be taken and sub function will be executed.
It is up to you to create additional swi call by updating the swi,h and swi.c file.
Please let me know if I've answer your question.
Best Regards,
Jean-Marc
Hi Jean-Marc,
thank you for making available the project! But if I use the code and integrate this in my own project I always run into sys_intvecs.asm at svcEntry and run their in a loop.
Kind Regards
Friedrich
Friedrich,
In my previous post, I've forgot to mention that SWI cannot be used when the CPU is already in SVC mode.
The reason is, on execution of SWI, the CPU before jumping to the SWI exception, will save the return address in the SVC_LR.
Whatever address was previously in the SVC_LR will be lost.
Concerning your problem, I don't really understand the condition.
Will it be possible to share your project so I can have a look?
Regards,
Jean-Marc
Friedrich,
Did I answer your question?
If yes, can you please mark my answer as "Verified Answer" so I can close this thread.
Thanks and Regards,
Jean-Marc
Jean Marc,
you answer my question and can close the thread. It wasn´t possible to mark as "Verified Answer".
Kind regards
Friedrich