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Help :About LBIST(STC) fault inserting!!!

Supcon-Jason
Prodigy 140 points
Other Parts Discussed in Thread: HALCOGEN

I read the Safety Manual for Hercules TMS570LS20x10x.pdf---March 2012;Safety Manual(Page21) mentioned:
LBIST logic includes capabilities for testing proper operation of the diagnostic；
1、Enable the self_check_key and fault_ins bits in the STCSTSCR Register；
2、Enable STC test interval zero and execute the test；
3、....

I think it is a fuction about LBIST fault inserting,and the procedure.But i can not find any imformation about STCSTSCR Register in TMS570LS20x10x
TMS570LS20xxx and 10xxx datasheet---July 2011 and TMS570LS20xxx and 10xxx Technical Reference Manual---February 2012.So the STCSTSCR Register’s base address？？
How to configure？？

  • 0
    TI__Intellectual 2310 points

    Hi Mao mao

    Thanks for using the forum.

    This register is not documented unfortunately.

    In fact I have noticed an additional issue in the STC register addresses in SPNU489C (Feb 2012). The addresses starting from 0x2C should be subtracted by 0x10. The last register CPU2_CURMISR0 which is listed at 0x48 is really at 0x38. The register you want is at 0x3C (STCSCSCR - STC self-check compare register). The fields of this register are listed below:

    Bits 3:0 - SELF_CHECK_KEY --> Signature compare logic self check key. Reset value - 0x5

    0xA - signature compare logic self check is enabled

    0x5 - signature compare logic self check is disabled

    Bit 4 - FAULT_INS --> Fault insertion. Reset value - 0

    0 - No fault insertion

    1 - Generates a signal, out of STC to CPU , for inserting a
    stuck-at fault (stuck-at-0) in the CPU which will make
    signature compare fail.

  • 0 in reply to Abhishek Shankar
    TI__Intellectual 2310 points

    Hi Mao mao

    I am sorry but I have to withdraw the answer I gave to you. I realized that you are using the TMS570LS20x which does not have the STCSCSCR register. The safety manual needs to be corrected in order to not mention this additional register. The comment regarding the addressing error (registers including and beyond 0x2c need to be subtracted by 0x10 for the right address) is still valid in the TMS570LS20x device.

  • 0 in reply to Abhishek Shankar
    Prodigy 140 points

              Which device family has STCSCSCR register? Any way, how can i test the function of LBIST module (TMS570LS20X)??Beside,when will TI public new modified TRM and safety mammul ?? 

  • 0 in reply to Supcon-Jason
    TI__Intellectual 2310 points

    Hi Mao mao

    The 570LS31 and 570LS21 families have this register.

    I will check on the date for this and let you know

  • 0 in reply to Abhishek Shankar
    Prodigy 140 points

    thank you !! I hope to receive your applying soon!!

  • 0 in reply to Supcon-Jason
    Mastermind 7585 points

    Looks like the STSSCSCR is still not documented properly. 

    Is this register also available in the RM48?

    It also looks like the HalCoGen - code for RM48 makes use of this register in "sys_selftest.c", but no documentation anywhwere.

    So TI, please shift gears and update your documentation!